From 92cb6d5938f59e3cd6579ee374e8989a0f97b6c1 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 14 Feb 2024 21:05:06 +0000 Subject: [PATCH 01/90] docs: add sha256sum for 24.0.1 --- docs/relnotes/24.0.1.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/relnotes/24.0.1.rst b/docs/relnotes/24.0.1.rst index 21478e67f51..b77cad62740 100644 --- a/docs/relnotes/24.0.1.rst +++ b/docs/relnotes/24.0.1.rst @@ -19,7 +19,7 @@ SHA256 checksum :: - TBD. + f387192b08c471c545590dd12230a2a343244804b5fe866fec6aea02eab57613 mesa-24.0.1.tar.xz New features From 19d0f2708fe16b8ae3b17d9e9624222b9eb61629 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Sat, 24 Feb 2024 18:24:49 +0000 Subject: [PATCH 02/90] [24.0-only change] ci: increase the kernel+rootfs builds timeout to 2h Overkill but better than being prevented from accepting backport MRs because Collabora deleted these files from the S3 bucket *yet again*... --- .gitlab-ci/container/gitlab-ci.yml | 1 + 1 file changed, 1 insertion(+) diff --git a/.gitlab-ci/container/gitlab-ci.yml b/.gitlab-ci/container/gitlab-ci.yml index 6e5e8b67c6a..fa5b6c39d4c 100644 --- a/.gitlab-ci/container/gitlab-ci.yml +++ b/.gitlab-ci/container/gitlab-ci.yml @@ -316,6 +316,7 @@ fedora/x86_64_build: .kernel+rootfs: + timeout: 2h # 24.0-only change extends: - .container+build-rules - .debian-container From 9d42171013b689911e82bbc5b9c4f4da0b5018e9 Mon Sep 17 00:00:00 2001 From: Jesse Natalie Date: Thu, 25 Jan 2024 15:24:49 -0800 Subject: [PATCH 03/90] dzn: Don't set view instancing mask until after the PSO Part-of: (cherry picked from commit fa1c9618f970ffd5e1ddf1fc0a4783bbee1d911e) --- .pick_status.json | 2 +- src/microsoft/vulkan/dzn_cmd_buffer.c | 10 ++++++++-- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 78f5be7b920..135fe50c62d 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -8244,7 +8244,7 @@ "description": "dzn: Don't set view instancing mask until after the PSO", "nominated": false, "nomination_type": 3, - "resolution": 4, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/microsoft/vulkan/dzn_cmd_buffer.c b/src/microsoft/vulkan/dzn_cmd_buffer.c index 8f3b114064f..d251d3fe653 100644 --- a/src/microsoft/vulkan/dzn_cmd_buffer.c +++ b/src/microsoft/vulkan/dzn_cmd_buffer.c @@ -3100,6 +3100,7 @@ dzn_cmd_buffer_update_pipeline(struct dzn_cmd_buffer *cmdbuf, uint32_t bindpoint ID3D12PipelineState *old_pipeline_state = cmdbuf->state.pipeline ? cmdbuf->state.pipeline->state : NULL; + uint32_t view_instance_mask = 0; if (cmdbuf->state.bindpoint[bindpoint].dirty & DZN_CMD_BINDPOINT_DIRTY_PIPELINE) { if (cmdbuf->state.bindpoint[bindpoint].root_sig != pipeline->root.sig) { cmdbuf->state.bindpoint[bindpoint].root_sig = pipeline->root.sig; @@ -3135,9 +3136,9 @@ dzn_cmd_buffer_update_pipeline(struct dzn_cmd_buffer *cmdbuf, uint32_t bindpoint ID3D12GraphicsCommandList1_IASetPrimitiveTopology(cmdbuf->cmdlist, gfx->ia.topology); dzn_graphics_pipeline_get_state(gfx, &cmdbuf->state.pipeline_variant); if (gfx->multiview.native_view_instancing) - ID3D12GraphicsCommandList1_SetViewInstanceMask(cmdbuf->cmdlist, gfx->multiview.view_mask); + view_instance_mask = gfx->multiview.view_mask; else - ID3D12GraphicsCommandList1_SetViewInstanceMask(cmdbuf->cmdlist, 1); + view_instance_mask = 1; if (gfx->zsa.dynamic_depth_bias && gfx->use_gs_for_polygon_mode_point) cmdbuf->state.bindpoint[bindpoint].dirty |= DZN_CMD_BINDPOINT_DIRTY_SYSVALS; @@ -3150,6 +3151,11 @@ dzn_cmd_buffer_update_pipeline(struct dzn_cmd_buffer *cmdbuf, uint32_t bindpoint ID3D12GraphicsCommandList1_SetPipelineState(cmdbuf->cmdlist, pipeline->state); cmdbuf->state.pipeline = pipeline; } + + /* Deferring this until after the pipeline has been set due to an NVIDIA driver bug + * when view instancing mask is set with no pipeline bound. */ + if (view_instance_mask) + ID3D12GraphicsCommandList1_SetViewInstanceMask(cmdbuf->cmdlist, view_instance_mask); } static void From 5c0de4ed9b6dc178b99857107ee58029f75cf6c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Sch=C3=BCrmann?= Date: Wed, 24 Jan 2024 16:36:02 +0100 Subject: [PATCH 04/90] spirv: Fix SpvOpExpectKHR This instruction behaves the same as *OpCopyObject* by making a copy of _Value_. Reviewed-by: Georg Lehmann Reviewed-by: Faith Ekstrand Reviewed-by: Caio Oliveira (cherry picked from commit 5df7be80173986093391e07105fc34c55e9a893d) Part-of: --- src/compiler/spirv/spirv_to_nir.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index ed2a003d722..f57c9ba42a2 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -4383,6 +4383,7 @@ vtn_handle_composite(struct vtn_builder *b, SpvOp opcode, break; } case SpvOpCopyObject: + case SpvOpExpectKHR: vtn_copy_value(b, w[3], w[2]); return; @@ -6458,18 +6459,18 @@ vtn_handle_body_instruction(struct vtn_builder *b, SpvOp opcode, vtn_handle_integer_dot(b, opcode, w, count); break; + case SpvOpBitcast: + vtn_handle_bitcast(b, w, count); + break; + /* TODO: One day, we should probably do something with this information * For now, though, it's safe to implement them as no-ops. * Needed for Rusticl sycl support. */ case SpvOpAssumeTrueKHR: + break; + case SpvOpExpectKHR: - break; - - case SpvOpBitcast: - vtn_handle_bitcast(b, w, count); - break; - case SpvOpVectorExtractDynamic: case SpvOpVectorInsertDynamic: case SpvOpVectorShuffle: From f41b8b1323841af47e6d644d584b1d623ed8174e Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 14 Feb 2024 22:03:27 +0000 Subject: [PATCH 05/90] .pick_status.json: Update to c6e855b64b9015235462959b2b7f3e9fc34b2f1f --- .pick_status.json | 170 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 170 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index 135fe50c62d..922587ccd0f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,174 @@ [ + { + "sha": "c6e855b64b9015235462959b2b7f3e9fc34b2f1f", + "description": "intel/compiler: Verify SIMD16 is used for xe2 BTD/RT dispatch", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "820e04ead4e3741c9ae93ff2f9197a4edc9af765", + "description": "intel/compiler: Implement nir_intrinsic_load_topology_id_intel for xe2", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "8f880d0ad7e9227bf1e99628b611bc280c1782ba", + "description": "intel/dev: Update max_subslices_per_slice comment", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "b533bf7361f6bbdae235904972f036dcbf979055", + "description": "intel/compiler: Set branch shader required-width as 16 for xe2", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "5022e5f4bf80b6fb5134eb165dd3891561bf0fad", + "description": "iris: Fix iris_batch_is_banned() check", + "nominated": false, + "nomination_type": 1, + "resolution": 4, + "main_sha": null, + "because_sha": "665d30b5448f606d7a79afe0596c3a2264ab3e15", + "notes": null + }, + { + "sha": "460d2c46a903fed295a1528c8b6273dd6b0e0d19", + "description": "mesa: fix off-by-one for newblock allocation in dlist_alloc", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4423454daa70b2ac01acc193a503fe4d02feb787", + "description": "intel/common: Implement xe_engines_is_guc_semaphore_functional()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "ac941b13f147fe5c16c014e74f9fdec002645413", + "description": "intel: Sync xe_drm.h", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "dff96257da6ea1e2eeae1852085b8c1bfa061ac5", + "description": "intel/common: Implement i915_engines_is_guc_semaphore_functional()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "731121c9824b234ee88800004b75318ba4bb5fb5", + "description": "intel: Sync i915_drm.h", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "0a129d8e1f3842ad566b13796b7e5f04fa9b1b34", + "description": "iris: Use intel_engines_supported_count()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "29ee85c2039a202d522051b987e129efb00d18bd", + "description": "anv: Use intel_engines_supported_count()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "fe2982278f46aa4a802839c193cd8afc7831108c", + "description": "intel/common: Add intel_engines_supported_count()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "ffca423472ebab901d50ef63dc1f076bbc8303a5", + "description": "intel: Remove circular dependency between intel/dev and intel/common", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "6b5c446556b96d58d7741582872451bb355e6d48", + "description": "intel/common: Fix location of C++ support macro in intel_gem.h", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "398bdb46babcf6d9137ace76f1b58e35c43db60d", + "description": "anv: Drop include to common/i915/intel_gem.h", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "e136a0629dfe7ecd7124934d3078351ba50617a9", + "description": "radv/gfx11+: add rtwave32 perftest option", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, { "sha": "90eae30bcb84d54dc871ddbb8355f729cf8fa900", "description": "rusticl/mem: move pipe_image_host_access into Image", From be6a909520c82f2cfc220d2b59fe5f129c882616 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 7 Jun 2023 10:26:31 +0300 Subject: [PATCH 06/90] vulkan/runtime: add helper to query attachment layout The runtime is turning GENERAL layouts into FEEDBACK_LOOP ones when it detects feedback loops in a render pass. This is breaking drivers that would like to use a different HW layout for those 2 layouts because if the application inserts barrier in the render pass, the barriers the driver sees are inconsistent. This could lead to barrier of this type : - GENERAL -> FEEDBACK_LOOP (runtime) - GENERAL -> GENERAL (app) - FEEDBACK_LOOP -> GENERAL (runtime) Signed-off-by: Lionel Landwerlin Reviewed-by: Ivan Briano Part-of: (cherry picked from commit 76cf391255df07e8a2f0ffcdea74707baba8587a) --- .pick_status.json | 2 +- src/vulkan/runtime/vk_command_buffer.h | 6 +++ src/vulkan/runtime/vk_render_pass.c | 59 ++++++++++++++++++++------ src/vulkan/runtime/vk_render_pass.h | 19 ++++++++- 4 files changed, 71 insertions(+), 15 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 922587ccd0f..0ecf92ca89a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -7914,7 +7914,7 @@ "description": "vulkan/runtime: add helper to query attachment layout", "nominated": false, "nomination_type": 3, - "resolution": 4, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/vulkan/runtime/vk_command_buffer.h b/src/vulkan/runtime/vk_command_buffer.h index 9d2b818655c..e49b3077d34 100644 --- a/src/vulkan/runtime/vk_command_buffer.h +++ b/src/vulkan/runtime/vk_command_buffer.h @@ -174,6 +174,12 @@ struct vk_command_buffer { struct vk_framebuffer *framebuffer; VkRect2D render_area; + /** + * True if we are currently inside a CmdPipelineBarrier() is inserted by + * the runtime's vk_render_pass.c + */ + bool runtime_rp_barrier; + /* This uses the same trick as STACK_ARRAY */ struct vk_attachment_state *attachments; struct vk_attachment_state _attachments[8]; diff --git a/src/vulkan/runtime/vk_render_pass.c b/src/vulkan/runtime/vk_render_pass.c index 826fd21a9f3..9eb69987383 100644 --- a/src/vulkan/runtime/vk_render_pass.c +++ b/src/vulkan/runtime/vk_render_pass.c @@ -1392,13 +1392,40 @@ can_use_attachment_initial_layout(struct vk_command_buffer *cmd_buffer, return true; } -static void -set_attachment_layout(struct vk_command_buffer *cmd_buffer, - uint32_t att_idx, - uint32_t view_mask, - VkImageLayout layout, - VkImageLayout stencil_layout) +uint32_t +vk_command_buffer_get_attachment_layout(const struct vk_command_buffer *cmd_buffer, + const struct vk_image *image, + VkImageLayout *out_layout, + VkImageLayout *out_stencil_layout) { + const struct vk_render_pass *render_pass = cmd_buffer->render_pass; + assert(render_pass != NULL); + + const struct vk_subpass *subpass = + &render_pass->subpasses[cmd_buffer->subpass_idx]; + int first_view = ffs(subpass->view_mask) - 1; + + for (uint32_t a = 0; a < render_pass->attachment_count; a++) { + if (cmd_buffer->attachments[a].image_view->image == image) { + *out_layout = cmd_buffer->attachments[a].views[first_view].layout; + *out_stencil_layout = + cmd_buffer->attachments[a].views[first_view].stencil_layout; + return a; + } + } + unreachable("Image not found in attachments"); +} + +void +vk_command_buffer_set_attachment_layout(struct vk_command_buffer *cmd_buffer, + uint32_t att_idx, + VkImageLayout layout, + VkImageLayout stencil_layout) +{ + const struct vk_render_pass *render_pass = cmd_buffer->render_pass; + const struct vk_subpass *subpass = + &render_pass->subpasses[cmd_buffer->subpass_idx]; + uint32_t view_mask = subpass->view_mask; struct vk_attachment_state *att_state = &cmd_buffer->attachments[att_idx]; u_foreach_bit(view, view_mask) { @@ -1650,9 +1677,10 @@ begin_subpass(struct vk_command_buffer *cmd_buffer, }; __vk_append_struct(color_attachment, color_initial_layout); - set_attachment_layout(cmd_buffer, sp_att->attachment, - subpass->view_mask, - sp_att->layout, VK_IMAGE_LAYOUT_UNDEFINED); + vk_command_buffer_set_attachment_layout(cmd_buffer, + sp_att->attachment, + sp_att->layout, + VK_IMAGE_LAYOUT_UNDEFINED); } } else { /* We've seen at least one of the views of this attachment before so @@ -1770,9 +1798,10 @@ begin_subpass(struct vk_command_buffer *cmd_buffer, &stencil_initial_layout); } - set_attachment_layout(cmd_buffer, sp_att->attachment, - subpass->view_mask, - sp_att->layout, sp_att->stencil_layout); + vk_command_buffer_set_attachment_layout(cmd_buffer, + sp_att->attachment, + sp_att->layout, + sp_att->stencil_layout); } } else { /* We've seen at least one of the views of this attachment before so @@ -2048,8 +2077,10 @@ begin_subpass(struct vk_command_buffer *cmd_buffer, .pImageMemoryBarriers = image_barrier_count > 0 ? image_barriers : NULL, }; + cmd_buffer->runtime_rp_barrier = true; disp->CmdPipelineBarrier2(vk_command_buffer_to_handle(cmd_buffer), &dependency_info); + cmd_buffer->runtime_rp_barrier = false; } STACK_ARRAY_FINISH(image_barriers); @@ -2227,8 +2258,10 @@ end_subpass(struct vk_command_buffer *cmd_buffer, .memoryBarrierCount = 1, .pMemoryBarriers = &mem_barrier, }; + cmd_buffer->runtime_rp_barrier = true; disp->CmdPipelineBarrier2(vk_command_buffer_to_handle(cmd_buffer), &dependency_info); + cmd_buffer->runtime_rp_barrier = false; } } @@ -2455,8 +2488,10 @@ vk_common_CmdEndRenderPass2(VkCommandBuffer commandBuffer, .imageMemoryBarrierCount = image_barrier_count, .pImageMemoryBarriers = image_barriers, }; + cmd_buffer->runtime_rp_barrier = true; disp->CmdPipelineBarrier2(vk_command_buffer_to_handle(cmd_buffer), &dependency_info); + cmd_buffer->runtime_rp_barrier = false; } STACK_ARRAY_FINISH(image_barriers); diff --git a/src/vulkan/runtime/vk_render_pass.h b/src/vulkan/runtime/vk_render_pass.h index 71ba81ec059..9acd65aa3ad 100644 --- a/src/vulkan/runtime/vk_render_pass.h +++ b/src/vulkan/runtime/vk_render_pass.h @@ -29,6 +29,9 @@ extern "C" { #endif +struct vk_command_buffer; +struct vk_image; + /** * Pseudo-extension struct that may be chained into VkRenderingAttachmentInfo * to indicate an initial layout for the attachment. This is only allowed if @@ -425,9 +428,9 @@ vk_subpass_dependency_is_fb_local(const VkSubpassDependency2 *dep, VK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT | VK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT; - const VkPipelineStageFlags2 src_framebuffer_space_stages = + const VkPipelineStageFlags2 src_framebuffer_space_stages = framebuffer_space_stages | VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT; - const VkPipelineStageFlags2 dst_framebuffer_space_stages = + const VkPipelineStageFlags2 dst_framebuffer_space_stages = framebuffer_space_stages | VK_PIPELINE_STAGE_2_BOTTOM_OF_PIPE_BIT; /* Check for frambuffer-space dependency. */ @@ -439,6 +442,18 @@ vk_subpass_dependency_is_fb_local(const VkSubpassDependency2 *dep, return dep->dependencyFlags & VK_DEPENDENCY_BY_REGION_BIT; } +uint32_t +vk_command_buffer_get_attachment_layout(const struct vk_command_buffer *cmd_buffer, + const struct vk_image *image, + VkImageLayout *out_layout, + VkImageLayout *out_stencil_layout); + +void +vk_command_buffer_set_attachment_layout(struct vk_command_buffer *cmd_buffer, + uint32_t att_idx, + VkImageLayout layout, + VkImageLayout stencil_layout); + #ifdef __cplusplus } #endif From 4c434ac992fb68eb9e2ba3bba1f92297b6121b88 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 8 Feb 2024 09:10:30 +0100 Subject: [PATCH 07/90] radv: fix RGP barrier reason for RP barriers inserted by the runtime Without that, RGP is confused and it's reporting CmdPipelineBarrier() instead of CmdRenderPassSync(). Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit b58de424f41ffcdd2c997276c7d20a659e10c272) --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 9 ++++++++- 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 0ecf92ca89a..a625bf9f39a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2074,7 +2074,7 @@ "description": "radv: fix RGP barrier reason for RP barriers inserted by the runtime", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 5c6cb7f76d7..173ab81c832 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -10642,8 +10642,15 @@ VKAPI_ATTR void VKAPI_CALL radv_CmdPipelineBarrier2(VkCommandBuffer commandBuffer, const VkDependencyInfo *pDependencyInfo) { RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); + enum rgp_barrier_reason barrier_reason; - radv_barrier(cmd_buffer, pDependencyInfo, RGP_BARRIER_EXTERNAL_CMD_PIPELINE_BARRIER); + if (cmd_buffer->vk.runtime_rp_barrier) { + barrier_reason = RGP_BARRIER_EXTERNAL_RENDER_PASS_SYNC; + } else { + barrier_reason = RGP_BARRIER_EXTERNAL_CMD_PIPELINE_BARRIER; + } + + radv_barrier(cmd_buffer, pDependencyInfo, barrier_reason); } static void From e886ee02eddc0454dd484405db6c9a2e879f33f8 Mon Sep 17 00:00:00 2001 From: thfrwn <11335318+rfht@users.noreply.github.com> Date: Fri, 9 Feb 2024 17:00:55 -0500 Subject: [PATCH 08/90] mesa: fix off-by-one for newblock allocation in dlist_alloc Cc: mesa-stable Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: (cherry picked from commit 460d2c46a903fed295a1528c8b6273dd6b0e0d19) --- .pick_status.json | 2 +- src/mesa/main/dlist.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a625bf9f39a..b26eda71661 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -54,7 +54,7 @@ "description": "mesa: fix off-by-one for newblock allocation in dlist_alloc", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c index 63feef2b097..8c32ed80d79 100644 --- a/src/mesa/main/dlist.c +++ b/src/mesa/main/dlist.c @@ -1220,7 +1220,7 @@ dlist_alloc(struct gl_context *ctx, OpCode opcode, GLuint bytes, bool align8) ctx->ListState.CurrentPos++; } - if (ctx->ListState.CurrentPos + numNodes + contNodes > BLOCK_SIZE) { + if (ctx->ListState.CurrentPos + numNodes + contNodes >= BLOCK_SIZE) { /* This block is full. Allocate a new block and chain to it */ Node *newblock; Node *n = ctx->ListState.CurrentBlock + ctx->ListState.CurrentPos; From f43c8e6694510e9a283352f9bb0712950e37c192 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Fri, 16 Feb 2024 15:04:04 +0000 Subject: [PATCH 09/90] .pick_status.json: Update to dce20690542c84ac00509a6db7902dcfc90b25bb --- .pick_status.json | 2450 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 2450 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index b26eda71661..3f4c62ced20 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,2454 @@ [ + { + "sha": "dce20690542c84ac00509a6db7902dcfc90b25bb", + "description": "radv/ci: switch vkcts-polaris10 from mupuf to KWS' farm", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "19439624d9fac333bcd046683bf172a89ff16873", + "description": "anv: Use DRM_XE_VM_BIND_OP_UNMAP_ALL to unbind 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gut macOS related code", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "5e8168f1b7c0b66bc8aacdbf30ad6cf4ed25a67e", + "description": "asahi: add more uapi stubs", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "db144685a9acd8f06adfab2e978bf2dde8bebac0", + "description": "compiler: add a vs.tes_agx bit", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, { "sha": "c6e855b64b9015235462959b2b7f3e9fc34b2f1f", "description": "intel/compiler: Verify SIMD16 is used for xe2 BTD/RT dispatch", From ef8f54de13c8b1f4b7d6d6531298cf4c0cac1d2c Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Roukala=20=28n=C3=A9=20Peres=29?= Date: Fri, 16 Feb 2024 13:32:17 +0200 Subject: [PATCH 10/90] radv/ci: switch vkcts-polaris10 from mupuf to KWS' farm The DUT that currently hosts the Polaris10 will be used for NVK testing, so let's move the polaris10 job to another farm. Part-of: (cherry picked from commit dce20690542c84ac00509a6db7902dcfc90b25bb) --- .pick_status.json | 2 +- src/amd/ci/gitlab-ci.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 3f4c62ced20..bd898a6fe76 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -4,7 +4,7 @@ "description": "radv/ci: switch vkcts-polaris10 from mupuf to KWS' farm", "nominated": false, "nomination_type": 3, - "resolution": 4, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/ci/gitlab-ci.yml b/src/amd/ci/gitlab-ci.yml index 5ee36998612..650640e17b5 100644 --- a/src/amd/ci/gitlab-ci.yml +++ b/src/amd/ci/gitlab-ci.yml @@ -163,7 +163,7 @@ radeonsi-raven-va-full:x86_64: vkcts-polaris10-valve: extends: - .vkcts-test-valve - - .polaris10-test-valve-mupuf + - .polaris10-test-valve-kws - .radv-valve-manual-rules timeout: 1h 15m variables: From eb72574c8d48eaeb46373ca4281b9670af491879 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 21 Feb 2024 11:13:36 +0000 Subject: [PATCH 11/90] .pick_status.json: Update to c12300844d3f084ca011a3f54f0cbaa9807418f0 --- .pick_status.json | 1020 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1020 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index bd898a6fe76..b0976205ee6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,1024 @@ [ + { + "sha": "c12300844d3f084ca011a3f54f0cbaa9807418f0", + "description": "intel/fs: Don't rely on CSE for VARYING_PULL_CONSTANT_LOAD", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "1880e7cfed18eecc8acc2c48df86d92e72df9177", + "description": "v3d,v3dv: fix BO allocation for shared vars", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "f47858b8375f5abfba031b1a5ea9b5dbf122dbf0", + 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shaders if enabled", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "0db2d13af1a7f04f8461691db062b9111efae6df", + "description": "radeonsi/vcn: only use multi slices reflist when available", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, { "sha": "dce20690542c84ac00509a6db7902dcfc90b25bb", "description": "radv/ci: switch vkcts-polaris10 from mupuf to KWS' farm", From f32c100fccfca608497d774cf8159b0a420258c4 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 21 Feb 2024 11:31:38 +0000 Subject: [PATCH 12/90] .pick_status.json: Mark 3b927567ac927316eb11901f50ee1573ead44fd2 as denominated --- .pick_status.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index b0976205ee6..bdd46161c77 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2934,7 +2934,7 @@ "description": "Revert \"asahi: don't canonicalize nans/flush denorms when copying\"", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 2, "main_sha": null, "because_sha": "ab7fb3d40072612ffe4d073ff2882102ffcb8a1c", "notes": null From edf03628d7c90057c4765282fb08fec845da8fb0 Mon Sep 17 00:00:00 2001 From: Jordan Justen Date: Wed, 14 Feb 2024 14:03:48 -0800 Subject: [PATCH 13/90] intel/dev: Add 2 additional ADL-N PCI ids MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Ref: https://patchwork.freedesktop.org/patch/578271/?series=129901&rev=1 Ref: bspec 68397 Cc: mesa-stable Signed-off-by: Jordan Justen Reviewed-by: Tapani Pälli Part-of: (cherry picked from commit 62b72b6be9742c655d381348c6b161afc6b5396f) --- .pick_status.json | 2 +- include/pci_ids/iris_pci_ids.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index bdd46161c77..858e11e4321 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1584,7 +1584,7 @@ "description": "intel/dev: Add 2 additional ADL-N PCI ids", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h index 46bbe20f6e8..f145d9f3b6d 100644 --- a/include/pci_ids/iris_pci_ids.h +++ b/include/pci_ids/iris_pci_ids.h @@ -187,6 +187,8 @@ CHIPSET(0x46c3, adl_gt2, "ADL GT2", "Intel(R) Graphics") CHIPSET(0x46d0, adl_n, "ADL-N", "Intel(R) Graphics") CHIPSET(0x46d1, adl_n, "ADL-N", "Intel(R) Graphics") CHIPSET(0x46d2, adl_n, "ADL-N", "Intel(R) Graphics") +CHIPSET(0x46d3, adl_n, "ADL-N", "Intel(R) Graphics") +CHIPSET(0x46d4, adl_n, "ADL-N", "Intel(R) Graphics") CHIPSET(0x9a40, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics") CHIPSET(0x9a49, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics") From c1b9d9118f80e08f36a48e9f7bc9f46565a0ee1b Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Sun, 25 Feb 2024 11:40:30 +0000 Subject: [PATCH 14/90] .pick_status.json: Update to 423add61e2d5b6ab6b5505d1feec01b93609f8fc --- .pick_status.json | 2020 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 2020 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index 858e11e4321..3aca16183ac 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,2024 @@ [ + { + "sha": "423add61e2d5b6ab6b5505d1feec01b93609f8fc", + "description": "gallium: lima: Don't round height when checking alignment", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "642b12baef65889000c47d0efd8f0cdf2e49cad5", + "description": "anv: limit depth flush on dynamic render pass suspend", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "abeac8cf96d9fbba3126339b2a62005ba8fd2dfc", + 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"137b7e874f22a9b4ce37b4cbe2a11576f7648109", + "description": "anv: disable Wa_16013994831", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "e6e320fc7996db60231d277bc3e28fdd01018b33", + "notes": null + }, + { + "sha": "78ea304a06cda5ddfed9cabb7c13ea2a82392ece", + "description": "spirv: only consider IO variables when adjusting patch locations for TES", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "dfbc03fa88478126607c69723a61280f6e9a011f", + "notes": null + }, { "sha": "c12300844d3f084ca011a3f54f0cbaa9807418f0", "description": "intel/fs: Don't rely on CSE for VARYING_PULL_CONSTANT_LOAD", From 000135abe158be3fbd09b67696444f670c77ece1 Mon Sep 17 00:00:00 2001 From: Yiwei Zhang Date: Mon, 29 Jan 2024 14:41:50 -0800 Subject: [PATCH 15/90] venus: force async pipeline create on threads creating descriptor pools This works around some Unity engine behaivor with ANGLE-on-Venus, when cmd pools are created on main thread once while the render thread only does descriptor pool creation for set allocations during recording time. This change also explicitly forces async pipeline create for threads creating the device instead of implicitly via feedback cmd pool create. This ensures intended behavior when feedback is disabled. Fixes: d17ddcc8477 ("venus: dispatch background shader tasks to secondary ring") Signed-off-by: Yiwei Zhang Part-of: (cherry picked from commit 1718980e851c1cfaba80098bcd10915a7522e882) --- .pick_status.json | 2 +- src/virtio/vulkan/vn_descriptor_set.c | 2 ++ src/virtio/vulkan/vn_device.c | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 3aca16183ac..42e1020dee1 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -11884,7 +11884,7 @@ "description": "venus: force async pipeline create on threads creating descriptor pools", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "d17ddcc84773899ef8b022d94969ffc0909db0bc", "notes": null diff --git a/src/virtio/vulkan/vn_descriptor_set.c b/src/virtio/vulkan/vn_descriptor_set.c index a1899c3b409..f079262421b 100644 --- a/src/virtio/vulkan/vn_descriptor_set.c +++ b/src/virtio/vulkan/vn_descriptor_set.c @@ -390,6 +390,8 @@ vn_CreateDescriptorPool(VkDevice device, vn_async_vkCreateDescriptorPool(dev->primary_ring, device, pCreateInfo, NULL, &pool_handle); + vn_tls_set_async_pipeline_create(); + *pDescriptorPool = pool_handle; return VK_SUCCESS; diff --git a/src/virtio/vulkan/vn_device.c b/src/virtio/vulkan/vn_device.c index 00ff23ebced..61e49de673e 100644 --- a/src/virtio/vulkan/vn_device.c +++ b/src/virtio/vulkan/vn_device.c @@ -570,6 +570,8 @@ vn_CreateDevice(VkPhysicalDevice physicalDevice, vn_log(instance, "%s", physical_dev->properties.vulkan_1_2.driverInfo); } + vn_tls_set_async_pipeline_create(); + *pDevice = vn_device_to_handle(dev); return VK_SUCCESS; From be7a46c3c5cadaa5d9f593832f4ca8fc0033d0a0 Mon Sep 17 00:00:00 2001 From: Juston Li Date: Fri, 2 Feb 2024 13:29:23 -0800 Subject: [PATCH 16/90] venus: fix image reqs cache store locking lock the entire scope when storing image reqs cache entry to prevent entry being added between the split locks. Fixes: b51ff22fbe8 ("venus: support caching image memory requirements") Signed-off-by: Juston Li Part-of: (cherry picked from commit f3de6f17c180dc31d21daea08a8f987d273481c3) --- .pick_status.json | 2 +- src/virtio/vulkan/vn_image.c | 29 +++++++++++++++++------------ 2 files changed, 18 insertions(+), 13 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 42e1020dee1..602a476c362 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -9394,7 +9394,7 @@ "description": "venus: fix image reqs cache store locking", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "b51ff22fbe8c9786f968e102ef8d223f415fcaba", "notes": null diff --git a/src/virtio/vulkan/vn_image.c b/src/virtio/vulkan/vn_image.c index e7a5a791895..ccb7ca0ad26 100644 --- a/src/virtio/vulkan/vn_image.c +++ b/src/virtio/vulkan/vn_image.c @@ -231,8 +231,15 @@ vn_image_store_reqs_in_cache(struct vn_device *dev, assert(cache->ht); simple_mtx_lock(&cache->mutex); - uint32_t cache_entry_count = _mesa_hash_table_num_entries(cache->ht); - if (cache_entry_count == IMAGE_REQS_CACHE_MAX_ENTRIES) { + + /* Check if entry was added before lock */ + if (_mesa_hash_table_search(cache->ht, key)) { + simple_mtx_unlock(&cache->mutex); + return; + } + + if (_mesa_hash_table_num_entries(cache->ht) == + IMAGE_REQS_CACHE_MAX_ENTRIES) { /* Evict/use the last entry in the lru list for this new entry */ cache_entry = list_last_entry(&cache->lru, struct vn_image_reqs_cache_entry, head); @@ -242,11 +249,11 @@ vn_image_store_reqs_in_cache(struct vn_device *dev, } else { cache_entry = vk_zalloc(alloc, sizeof(*cache_entry), VN_DEFAULT_ALIGN, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT); + if (!cache_entry) { + simple_mtx_unlock(&cache->mutex); + return; + } } - simple_mtx_unlock(&cache->mutex); - - if (!cache_entry) - return; for (uint32_t i = 0; i < plane_count; i++) cache_entry->requirements[i] = requirements[i]; @@ -254,12 +261,10 @@ vn_image_store_reqs_in_cache(struct vn_device *dev, memcpy(cache_entry->key, key, SHA1_DIGEST_LENGTH); cache_entry->plane_count = plane_count; - simple_mtx_lock(&cache->mutex); - if (!_mesa_hash_table_search(cache->ht, cache_entry->key)) { - _mesa_hash_table_insert(dev->image_reqs_cache.ht, cache_entry->key, - cache_entry); - list_add(&cache_entry->head, &cache->lru); - } + _mesa_hash_table_insert(dev->image_reqs_cache.ht, cache_entry->key, + cache_entry); + list_add(&cache_entry->head, &cache->lru); + simple_mtx_unlock(&cache->mutex); } From 3ba68813f2e5beff04afc946aa61f320af0c7b34 Mon Sep 17 00:00:00 2001 From: Yiwei Zhang Date: Wed, 14 Feb 2024 17:17:39 -0800 Subject: [PATCH 17/90] venus: fix the cmd stride used for qfb recording Not a real issue since the dispatchable handle size is the same. Fixes: d2a626787e5 ("venus: track/recycle appended query feedback cmds") Signed-off-by: Yiwei Zhang Part-of: (cherry picked from commit 55224006b784b38d9c85ac2d9022ba56240130f2) --- .pick_status.json | 2 +- src/virtio/vulkan/vn_queue.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 602a476c362..286bac55a5c 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2854,7 +2854,7 @@ "description": "venus: fix the cmd stride used for qfb recording", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "d2a626787e559dad9105243be9e5043c9230853c", "notes": null diff --git a/src/virtio/vulkan/vn_queue.c b/src/virtio/vulkan/vn_queue.c index 22d469bba2a..3929b4275a3 100644 --- a/src/virtio/vulkan/vn_queue.c +++ b/src/virtio/vulkan/vn_queue.c @@ -600,7 +600,7 @@ vn_queue_submission_add_query_feedback(struct vn_queue_submission *submit, VkCommandBuffer *feedback_cmd_handle = vn_get_feedback_cmd_handle(submit, feedback_cmds, cmd_count); const uint32_t stride = submit->batch_type == VK_STRUCTURE_TYPE_SUBMIT_INFO - ? sizeof(VkCommandBuffer *) + ? sizeof(VkCommandBuffer) : sizeof(VkCommandBufferSubmitInfo); struct vn_feedback_cmd_pool *feedback_cmd_pool = NULL; From 1933436ada09e3c40870b1408f1a64e17f96346f Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 31 Jan 2024 12:39:08 -0500 Subject: [PATCH 18/90] zink: prune dmabuf export tracking when adding resource binds this avoids invalid access for the stack resource in add_resource_bind() when adding a new bind to an exportable resource cc: mesa-stable Part-of: (cherry picked from commit 7b7a581a52db21ed8826d6f2986ea6dfc208fb2a) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_resource.c | 5 +++++ 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 286bac55a5c..c3464bf255a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -10364,7 +10364,7 @@ "description": "zink: prune dmabuf export tracking when adding resource binds", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_resource.c b/src/gallium/drivers/zink/zink_resource.c index ae78836d15a..b2b85014855 100644 --- a/src/gallium/drivers/zink/zink_resource.c +++ b/src/gallium/drivers/zink/zink_resource.c @@ -1611,6 +1611,11 @@ add_resource_bind(struct zink_context *ctx, struct zink_resource *res, unsigned box.depth = util_num_layers(&res->base.b, i); ctx->base.resource_copy_region(&ctx->base, &res->base.b, i, 0, 0, 0, &staging.base.b, i, &box); } + if (old_obj->exportable) { + simple_mtx_lock(&ctx->batch.state->exportable_lock); + _mesa_set_remove_key(&ctx->batch.state->dmabuf_exports, &staging); + simple_mtx_unlock(&ctx->batch.state->exportable_lock); + } zink_resource_object_reference(screen, &old_obj, NULL); return true; } From 5da667ad3e5fc3cce98828a265c9801cc3200a7e Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 1 Feb 2024 10:26:10 -0500 Subject: [PATCH 19/90] zink: fix sparse bo placement the util function here takes a bitmask of memory type indices, not properties. rename the function and correct the usage fixes sparse on nvidia blob Fixes: c71287e70c2 ("zink: correct sparse bo mem_type_idx placement") Part-of: (cherry picked from commit 3b025d6b42476d27f5e8d6e2347f85874a50eb72) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_bo.c | 2 +- src/gallium/drivers/zink/zink_bo.h | 4 ++-- src/gallium/drivers/zink/zink_resource.c | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index c3464bf255a..cf4d2ee09b4 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -10224,7 +10224,7 @@ "description": "zink: fix sparse bo placement", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "c71287e70c2bf4aac96b24635e48ec13cd31fddf", "notes": null diff --git a/src/gallium/drivers/zink/zink_bo.c b/src/gallium/drivers/zink/zink_bo.c index b5b4f070765..7d4fa522b3e 100644 --- a/src/gallium/drivers/zink/zink_bo.c +++ b/src/gallium/drivers/zink/zink_bo.c @@ -548,7 +548,7 @@ bo_sparse_create(struct zink_screen *screen, uint64_t size) bo->base.base.alignment_log2 = util_logbase2(ZINK_SPARSE_BUFFER_PAGE_SIZE); bo->base.base.size = size; bo->base.vtbl = &bo_sparse_vtbl; - unsigned placement = zink_mem_type_idx_from_bits(screen, ZINK_HEAP_DEVICE_LOCAL_SPARSE, VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT); + unsigned placement = zink_mem_type_idx_from_types(screen, ZINK_HEAP_DEVICE_LOCAL_SPARSE, UINT32_MAX); assert(placement != UINT32_MAX); bo->base.base.placement = placement; bo->unique_id = p_atomic_inc_return(&screen->pb.next_bo_unique_id); diff --git a/src/gallium/drivers/zink/zink_bo.h b/src/gallium/drivers/zink/zink_bo.h index f747df6d869..cd7338aff5a 100644 --- a/src/gallium/drivers/zink/zink_bo.h +++ b/src/gallium/drivers/zink/zink_bo.h @@ -94,10 +94,10 @@ zink_heap_from_domain_flags(VkMemoryPropertyFlags domains, enum zink_alloc_flag } static ALWAYS_INLINE unsigned -zink_mem_type_idx_from_bits(struct zink_screen *screen, enum zink_heap heap, uint32_t bits) +zink_mem_type_idx_from_types(struct zink_screen *screen, enum zink_heap heap, uint32_t types) { for (unsigned i = 0; i < screen->heap_count[heap]; i++) { - if (bits & BITFIELD_BIT(screen->heap_map[heap][i])) { + if (types & BITFIELD_BIT(screen->heap_map[heap][i])) { return screen->heap_map[heap][i]; } } diff --git a/src/gallium/drivers/zink/zink_resource.c b/src/gallium/drivers/zink/zink_resource.c index b2b85014855..92f9d720ba3 100644 --- a/src/gallium/drivers/zink/zink_resource.c +++ b/src/gallium/drivers/zink/zink_resource.c @@ -1267,7 +1267,7 @@ resource_object_create(struct zink_screen *screen, const struct pipe_resource *t alignment = MAX2(alignment, screen->info.props.limits.minMemoryMapAlignment); obj->alignment = alignment; - if (zink_mem_type_idx_from_bits(screen, heap, reqs.memoryTypeBits) == UINT32_MAX) { + if (zink_mem_type_idx_from_types(screen, heap, reqs.memoryTypeBits) == UINT32_MAX) { /* not valid based on reqs; demote to more compatible type */ switch (heap) { case ZINK_HEAP_DEVICE_LOCAL_VISIBLE: @@ -1279,7 +1279,7 @@ resource_object_create(struct zink_screen *screen, const struct pipe_resource *t default: break; } - assert(zink_mem_type_idx_from_bits(screen, heap, reqs.memoryTypeBits) != UINT32_MAX); + assert(zink_mem_type_idx_from_types(screen, heap, reqs.memoryTypeBits) != UINT32_MAX); } retry: From 974829185e1a9473cb407f4d3434c81df8e6b970 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 1 Feb 2024 10:46:55 -0500 Subject: [PATCH 20/90] zink: zero allocate resident_defs array in ntv this makes assert(def!=0) more reliable Fixes: 73ef54e3424 ("zink: handle residency return value from sparse texture instructions") Part-of: (cherry picked from commit aacc4e1c687b643929d496cec72891b814fc2256) --- .pick_status.json | 2 +- src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index cf4d2ee09b4..524faccc15f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -10214,7 +10214,7 @@ "description": "zink: zero allocate resident_defs array in ntv", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "73ef54e34242fa59803a3a89b5a6eb92053e917e", "notes": null diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c index c30426aba83..5bcc6d6adeb 100644 --- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c +++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c @@ -4774,7 +4774,7 @@ nir_to_spirv(struct nir_shader *s, const struct zink_shader_info *sinfo, uint32_ /* this could be huge, so only alloc if needed since it's extremely unlikely to * ever be used by anything except cts */ - ctx.resident_defs = ralloc_array_size(ctx.mem_ctx, + ctx.resident_defs = rzalloc_array_size(ctx.mem_ctx, sizeof(SpvId), entry->ssa_alloc); if (!ctx.resident_defs) goto fail; From 7a0833e335684ad35e1bbb446095efc4b7225a49 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 1 Feb 2024 10:48:35 -0500 Subject: [PATCH 21/90] zink: move sparse lowering up in file no functional changes Fixes: 0d652c0c8db ("zink: shrink vectors during optimization") Part-of: (cherry picked from commit 6a8cd7a64fbf8a91d99a4c3f08a13b53ce5c72d6) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_compiler.c | 164 +++++++++++------------ 2 files changed, 83 insertions(+), 83 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 524faccc15f..12c9d4d7e6c 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -10204,7 +10204,7 @@ "description": "zink: move sparse lowering up in file", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "0d652c0c8db33ff80d16f30b2d2e8f4413946338", "notes": null diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 3674f412062..7b1bd87b355 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -3543,6 +3543,88 @@ invert_point_coord(nir_shader *nir) nir_metadata_dominance, NULL); } +static bool +is_residency_code(nir_def *src) +{ + nir_instr *parent = src->parent_instr; + while (1) { + if (parent->type == nir_instr_type_intrinsic) { + ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent); + assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident); + return false; + } + if (parent->type == nir_instr_type_tex) + return true; + assert(parent->type == nir_instr_type_alu); + nir_alu_instr *alu = nir_instr_as_alu(parent); + parent = alu->src[0].src.ssa->parent_instr; + } +} + +static bool +lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data) +{ + if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) { + b->cursor = nir_before_instr(&instr->instr); + nir_def *src0; + if (is_residency_code(instr->src[0].ssa)) + src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa); + else + src0 = instr->src[0].ssa; + nir_def *src1; + if (is_residency_code(instr->src[1].ssa)) + src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa); + else + src1 = instr->src[1].ssa; + nir_def *def = nir_iand(b, src0, src1); + nir_def_rewrite_uses_after(&instr->def, def, &instr->instr); + nir_instr_remove(&instr->instr); + return true; + } + if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident) + return false; + + /* vulkan vec can only be a vec4, but this is (maybe) vec5, + * so just rewrite as the first component since ntv is going to use a different + * method for storing the residency value anyway + */ + b->cursor = nir_before_instr(&instr->instr); + nir_instr *parent = instr->src[0].ssa->parent_instr; + if (is_residency_code(instr->src[0].ssa)) { + assert(parent->type == nir_instr_type_alu); + nir_alu_instr *alu = nir_instr_as_alu(parent); + nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent); + nir_instr_remove(parent); + } else { + nir_def *src; + if (parent->type == nir_instr_type_intrinsic) { + nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent); + assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident); + src = intr->src[0].ssa; + } else { + assert(parent->type == nir_instr_type_alu); + nir_alu_instr *alu = nir_instr_as_alu(parent); + src = alu->src[0].src.ssa; + } + if (instr->def.bit_size != 32) { + if (instr->def.bit_size == 1) + src = nir_ieq_imm(b, src, 1); + else + src = nir_u2uN(b, src, instr->def.bit_size); + } + nir_def_rewrite_uses(&instr->def, src); + nir_instr_remove(&instr->instr); + } + return true; +} + +static bool +lower_sparse(nir_shader *shader) +{ + return nir_shader_intrinsics_pass(shader, lower_sparse_instr, + nir_metadata_dominance, NULL); +} + static bool add_derefs_instr(nir_builder *b, nir_intrinsic_instr *intr, void *data) { @@ -4570,88 +4652,6 @@ scan_nir(struct zink_screen *screen, nir_shader *shader, struct zink_shader *zs) } } -static bool -is_residency_code(nir_def *src) -{ - nir_instr *parent = src->parent_instr; - while (1) { - if (parent->type == nir_instr_type_intrinsic) { - ASSERTED nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent); - assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident); - return false; - } - if (parent->type == nir_instr_type_tex) - return true; - assert(parent->type == nir_instr_type_alu); - nir_alu_instr *alu = nir_instr_as_alu(parent); - parent = alu->src[0].src.ssa->parent_instr; - } -} - -static bool -lower_sparse_instr(nir_builder *b, nir_intrinsic_instr *instr, void *data) -{ - if (instr->intrinsic == nir_intrinsic_sparse_residency_code_and) { - b->cursor = nir_before_instr(&instr->instr); - nir_def *src0; - if (is_residency_code(instr->src[0].ssa)) - src0 = nir_is_sparse_texels_resident(b, 1, instr->src[0].ssa); - else - src0 = instr->src[0].ssa; - nir_def *src1; - if (is_residency_code(instr->src[1].ssa)) - src1 = nir_is_sparse_texels_resident(b, 1, instr->src[1].ssa); - else - src1 = instr->src[1].ssa; - nir_def *def = nir_iand(b, src0, src1); - nir_def_rewrite_uses_after(&instr->def, def, &instr->instr); - nir_instr_remove(&instr->instr); - return true; - } - if (instr->intrinsic != nir_intrinsic_is_sparse_texels_resident) - return false; - - /* vulkan vec can only be a vec4, but this is (maybe) vec5, - * so just rewrite as the first component since ntv is going to use a different - * method for storing the residency value anyway - */ - b->cursor = nir_before_instr(&instr->instr); - nir_instr *parent = instr->src[0].ssa->parent_instr; - if (is_residency_code(instr->src[0].ssa)) { - assert(parent->type == nir_instr_type_alu); - nir_alu_instr *alu = nir_instr_as_alu(parent); - nir_def_rewrite_uses_after(instr->src[0].ssa, nir_channel(b, alu->src[0].src.ssa, 0), parent); - nir_instr_remove(parent); - } else { - nir_def *src; - if (parent->type == nir_instr_type_intrinsic) { - nir_intrinsic_instr *intr = nir_instr_as_intrinsic(parent); - assert(intr->intrinsic == nir_intrinsic_is_sparse_texels_resident); - src = intr->src[0].ssa; - } else { - assert(parent->type == nir_instr_type_alu); - nir_alu_instr *alu = nir_instr_as_alu(parent); - src = alu->src[0].src.ssa; - } - if (instr->def.bit_size != 32) { - if (instr->def.bit_size == 1) - src = nir_ieq_imm(b, src, 1); - else - src = nir_u2uN(b, src, instr->def.bit_size); - } - nir_def_rewrite_uses(&instr->def, src); - nir_instr_remove(&instr->instr); - } - return true; -} - -static bool -lower_sparse(nir_shader *shader) -{ - return nir_shader_intrinsics_pass(shader, lower_sparse_instr, - nir_metadata_dominance, NULL); -} - static bool match_tex_dests_instr(nir_builder *b, nir_instr *in, void *data) { From 3120d28d2d9fa8f93be14477bcd4ba6e6ceb9279 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 1 Feb 2024 10:48:47 -0500 Subject: [PATCH 22/90] zink: run sparse lowering after all optimization passes some passes (e.g., opt_shrink_vector) operate on the assumption that sparse tex ops have a certain number of components and then remove components and unset the sparse flag if they can optimize out the sparse usage zink's sparse ops do not have the standard number of components, which causes such passes to make incorrect assumptions and tag them as not being sparse, which breaks everything fix #10540 Fixes: 0d652c0c8db ("zink: shrink vectors during optimization") Part-of: (cherry picked from commit 2085d6043804c316939ac47d6b334007872655b7) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_compiler.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 12c9d4d7e6c..7ea071e1624 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -10194,7 +10194,7 @@ "description": "zink: run sparse lowering after all optimization passes", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "0d652c0c8db33ff80d16f30b2d2e8f4413946338", "notes": null diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 7b1bd87b355..9abcd86760f 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -4018,6 +4018,7 @@ zink_shader_compile(struct zink_screen *screen, bool can_shobj, struct zink_shad zs->can_inline = false; } else if (need_optimize) optimize_nir(nir, zs, true); + NIR_PASS_V(nir, lower_sparse); struct zink_shader_object obj = compile_module(screen, zs, nir, can_shobj, pg); ralloc_free(nir); @@ -5468,7 +5469,6 @@ zink_shader_create(struct zink_screen *screen, struct nir_shader *nir) NIR_PASS_V(nir, lower_basevertex); NIR_PASS_V(nir, lower_baseinstance); - NIR_PASS_V(nir, lower_sparse); NIR_PASS_V(nir, split_bitfields); NIR_PASS_V(nir, nir_lower_frexp); /* TODO: Use the spirv instructions for this. */ From 25d2384e1011bbe0da0c52a4c1804dc045b4ec89 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 8 Feb 2024 08:29:25 -0500 Subject: [PATCH 23/90] zink: adjust swizzled deref loads by the variable component offset this code is intended to transform a block like: ``` 32 %306 = @load_interpolated_input (%34, %0 (0x0)) (base=3, component=2, dest_type=float32, io location=VARYING_SLOT_VAR3 slots=1) 32x2 %307 = fsub %305, %306.xx ``` into derefs. the existing code generates this: ``` decl_var shader_in INTERP_MODE_NONE none vec2 #7 (VARYING_SLOT_VAR3.zw, 0, 0) 32 %516 = deref_var  (shader_in vec2) 32x2 %517 = @load_deref (%516) (access=none) 32 %518 = mov %517.z error: src->swizzle[i] < num_components (../src/compiler/nir/nir_validate.c:216) ``` the problem is attempting to reapply the component offset to a variable which is already at an offset fixes #10567 Fixes: 17a35412dcc ("zink: re-rework i/o variable handling to make having variables entirely optional") Part-of: (cherry picked from commit 0a243a7241e26292ca55a97f5f8d464001b532cd) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_compiler.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 7ea071e1624..6af5bb6196f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -8074,7 +8074,7 @@ "description": "zink: adjust swizzled deref loads by the variable component offset", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "17a35412dcc77a3058107100d27f734796a9d0ca", "notes": null diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 9abcd86760f..2ea83c70140 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -3761,7 +3761,7 @@ add_derefs_instr(nir_builder *b, nir_intrinsic_instr *intr, void *data) } /* filter needed components */ if (intr->num_components < load->num_components) - load = nir_channels(b, load, BITFIELD_MASK(intr->num_components) << c); + load = nir_channels(b, load, BITFIELD_MASK(intr->num_components) << (c - var->data.location_frac)); nir_def_rewrite_uses(&intr->def, load); } else { nir_def *store = intr->src[0].ssa; From 1528c6f524baaa7aaf51194b5beb5746de5862db Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Sun, 11 Feb 2024 15:41:46 +0100 Subject: [PATCH 24/90] zink: Always set mfence->submit_count to the fence submit_count Fixes glFinish not finishing all GPU work. cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8257 Part-of: (cherry picked from commit aed5e4e1f2bcbad5a63d483cf97bf7c30ca9cccc) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_context.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 6af5bb6196f..68b4b11395a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -7194,7 +7194,7 @@ "description": "zink: Always set mfence->submit_count to the fence submit_count", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 5916839c37b..63eb340e7b3 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -3803,7 +3803,6 @@ zink_flush(struct pipe_context *pctx, struct zink_batch *batch = &ctx->batch; struct zink_fence *fence = NULL; struct zink_screen *screen = zink_screen(ctx->base.screen); - unsigned submit_count = 0; VkSemaphore export_sem = VK_NULL_HANDLE; /* triggering clears will force has_work */ @@ -3882,7 +3881,6 @@ zink_flush(struct pipe_context *pctx, tc_driver_internal_flush_notify(ctx->tc); } else { fence = &batch->state->fence; - submit_count = batch->state->usage.submit_count; if (deferred && !(flags & PIPE_FLUSH_FENCE_FD) && pfence) deferred_fence = true; else @@ -3906,7 +3904,7 @@ zink_flush(struct pipe_context *pctx, mfence->fence = fence; mfence->sem = export_sem; if (fence) { - mfence->submit_count = submit_count; + mfence->submit_count = zink_batch_state(fence)->usage.submit_count; util_dynarray_append(&fence->mfences, struct zink_tc_fence *, mfence); } if (export_sem) { From a9c5611b49f793d3dbf93811a788701448a4a75c Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Sun, 11 Feb 2024 16:09:06 +0100 Subject: [PATCH 25/90] Revert "zink: always force flushes when originating from api frontend" This reverts commit 03f049f49730b8b1268f2975fc34ac2b1f9a4ef9. Part-of: (cherry picked from commit 097e543c0a061382e07063705225304eefff6d1f) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_context.c | 3 +-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 68b4b11395a..45c4a9207ea 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -7184,7 +7184,7 @@ "description": "Revert \"zink: always force flushes when originating from api frontend\"", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "03f049f49730b8b1268f2975fc34ac2b1f9a4ef9", "notes": null diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 63eb340e7b3..0a8c44e837b 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -3863,8 +3863,7 @@ zink_flush(struct pipe_context *pctx, } } - /* TODO: if swapchains gain timeline semaphore semantics, `flags` can be eliminated and no-op fence can return timeline id */ - if (!batch->has_work && flags) { + if (!batch->has_work) { if (pfence) { /* reuse last fence */ fence = ctx->last_fence; From 10eb12968bb2c7279f28f30ca040f33a796426d0 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 15 Feb 2024 14:16:08 -0500 Subject: [PATCH 26/90] zink: clamp zink_gfx_lib_cache::stages_present for generated tcs this otherwise does not reflect reality Fixes: d786f52f1ff ("zink: prevent crash when freeing") Reviewed-by: Dave Airlie Part-of: (cherry picked from commit 36e7350e0b86080bfcb3b6db481c89a97691dacb) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_program.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 45c4a9207ea..1d9e50f6501 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3214,7 +3214,7 @@ "description": "zink: clamp zink_gfx_lib_cache::stages_present for generated tcs", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "d786f52f1ff10fba42e87530933a2a4c68de49a8", "notes": null diff --git a/src/gallium/drivers/zink/zink_program.c b/src/gallium/drivers/zink/zink_program.c index 0832772c038..5d7bd54825f 100644 --- a/src/gallium/drivers/zink/zink_program.c +++ b/src/gallium/drivers/zink/zink_program.c @@ -1006,6 +1006,8 @@ create_lib_cache(struct zink_gfx_program *prog, bool generated_tcs) { struct zink_gfx_lib_cache *libs = CALLOC_STRUCT(zink_gfx_lib_cache); libs->stages_present = prog->stages_present; + if (generated_tcs) + libs->stages_present &= ~BITFIELD_BIT(MESA_SHADER_TESS_CTRL); simple_mtx_init(&libs->lock, mtx_plain); if (generated_tcs) _mesa_set_init(&libs->libs, NULL, hash_pipeline_lib_generated_tcs, equals_pipeline_lib_generated_tcs); From 3c1a634e7e8ae62d50bf43bc7cf1d21783baba9d Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 15 Feb 2024 08:59:13 -0500 Subject: [PATCH 27/90] zink: promote gpl libs freeing during shader destroy out of prog loop now that zink_gfx_lib_cache::stages_present exists (and is correct), this value can be used directly to effect cache eviction instead of depending on the prog->stages_present value, which may not even be the same prog that owns a given zink_gfx_lib_cache instance this fixes the case where a shader used in multiple progs with differing shader masks would never have all its gpl pipelines freed fixes leaks with caselist: KHR-Single-GL46.arrays_of_arrays_gl.InteractionUniformBuffers1 KHR-Single-GL46.subgroups.quad.framebuffer.subgroupquadbroadcast_3_float_vertex Fixes: d786f52f1ff ("zink: prevent crash when freeing") Reviewed-by: Dave Airlie Part-of: (cherry picked from commit e8ce53a33d5c4e2e5d007f0c9de05f113cc413df) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_compiler.c | 25 +++++++++++------------- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 1d9e50f6501..d898797dff3 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3204,7 +3204,7 @@ "description": "zink: promote gpl libs freeing during shader destroy out of prog loop", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "d786f52f1ff10fba42e87530933a2a4c68de49a8", "notes": null diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index 2ea83c70140..d487de5443b 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -5744,20 +5744,6 @@ zink_gfx_shader_free(struct zink_screen *screen, struct zink_shader *shader) } } - while (util_dynarray_contains(&shader->pipeline_libs, struct zink_gfx_lib_cache*)) { - struct zink_gfx_lib_cache *libs = util_dynarray_pop(&shader->pipeline_libs, struct zink_gfx_lib_cache*); - //this condition is equivalent to verifying that, for each bit stages_present_i in stages_present, - //stages_present_i implies libs->stages_present_i - if ((stages_present & ~(libs->stages_present & stages_present)) != 0) - continue; - if (!libs->removed) { - libs->removed = true; - simple_mtx_lock(&screen->pipeline_libs_lock[idx]); - _mesa_set_remove_key(&screen->pipeline_libs[idx], libs); - simple_mtx_unlock(&screen->pipeline_libs_lock[idx]); - } - zink_gfx_lib_cache_unref(screen, libs); - } if (stage == MESA_SHADER_FRAGMENT || !shader->non_fs.is_generated) { prog->shaders[stage] = NULL; prog->stages_remaining &= ~BITFIELD_BIT(stage); @@ -5773,6 +5759,17 @@ zink_gfx_shader_free(struct zink_screen *screen, struct zink_shader *shader) } zink_gfx_program_reference(screen, &prog, NULL); } + while (util_dynarray_contains(&shader->pipeline_libs, struct zink_gfx_lib_cache*)) { + struct zink_gfx_lib_cache *libs = util_dynarray_pop(&shader->pipeline_libs, struct zink_gfx_lib_cache*); + if (!libs->removed) { + libs->removed = true; + unsigned idx = zink_program_cache_stages(libs->stages_present); + simple_mtx_lock(&screen->pipeline_libs_lock[idx]); + _mesa_set_remove_key(&screen->pipeline_libs[idx], libs); + simple_mtx_unlock(&screen->pipeline_libs_lock[idx]); + } + zink_gfx_lib_cache_unref(screen, libs); + } if (shader->info.stage == MESA_SHADER_TESS_EVAL && shader->non_fs.generated_tcs) { /* automatically destroy generated tcs shaders when tes is destroyed */ From b9def8ca05fa700208837fcc470721525487bd79 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 15 Feb 2024 15:07:29 -0500 Subject: [PATCH 28/90] zink: don't add VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT for sparse textures according to VUID-VkImageCreateInfo-flags-09403, this is illegal cc: mesa-stable Reviewed-by: Dave Airlie Part-of: (cherry picked from commit 4c08db550183b085989468e0d6d1f97cc98e4c8e) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_resource.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index d898797dff3..4ed7eefb8ff 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3194,7 +3194,7 @@ "description": "zink: don't add VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT for sparse textures", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_resource.c b/src/gallium/drivers/zink/zink_resource.c index 92f9d720ba3..0c692cff6e9 100644 --- a/src/gallium/drivers/zink/zink_resource.c +++ b/src/gallium/drivers/zink/zink_resource.c @@ -729,7 +729,8 @@ init_ici(struct zink_screen *screen, VkImageCreateInfo *ici, const struct pipe_r case PIPE_TEXTURE_3D: ici->imageType = VK_IMAGE_TYPE_3D; - ici->flags |= VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT; + if (!(templ->flags & PIPE_RESOURCE_FLAG_SPARSE)) + ici->flags |= VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT; if (screen->info.have_EXT_image_2d_view_of_3d) ici->flags |= VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT; break; From e730b1b62bb96838c93129ac38217b3e6d677291 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Mon, 19 Feb 2024 10:23:20 -0500 Subject: [PATCH 29/90] zink: delete maxDescriptorBufferBindings checks only one descriptor buffer is used now Fixes: 13c6ad0038a ("zink: use a single descriptor buffer for all non-bindless types") Part-of: (cherry picked from commit b8b51d96b0146028ecb5c58703707fe994540119) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_screen.c | 17 ----------------- 2 files changed, 1 insertion(+), 18 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 4ed7eefb8ff..98922f33f66 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2534,7 +2534,7 @@ "description": "zink: delete maxDescriptorBufferBindings checks", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "13c6ad0038aa42f1c908ca1adecde9bebf9f2509", "notes": null diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c index 1f06a606b66..dacad5cfa82 100644 --- a/src/gallium/drivers/zink/zink_screen.c +++ b/src/gallium/drivers/zink/zink_screen.c @@ -3465,23 +3465,6 @@ zink_internal_create_screen(const struct pipe_screen_config *config, int64_t dev mesa_logw("zink: bug detected: inputAttachmentDescriptorSize(%u) > %u", (unsigned)screen->info.db_props.inputAttachmentDescriptorSize, ZINK_FBFETCH_DESCRIPTOR_SIZE); can_db = false; } - if (screen->compact_descriptors) { - if (screen->info.db_props.maxDescriptorBufferBindings < 3) { - if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_DB) { - mesa_loge("Cannot use db descriptor mode with compact descriptors with maxDescriptorBufferBindings < 3"); - goto fail; - } - can_db = false; - } - } else { - if (screen->info.db_props.maxDescriptorBufferBindings < 5) { - if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_DB) { - mesa_loge("Cannot use db descriptor mode with maxDescriptorBufferBindings < 5"); - goto fail; - } - can_db = false; - } - } } if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_AUTO) { /* descriptor buffer is not performant with virt yet */ From 4d87eb83daf8ecdb68ca6b6ece448712b9988b79 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Fri, 2 Feb 2024 09:08:04 -0500 Subject: [PATCH 30/90] zink: avoid infinite recursion on (very) small BAR systems in bo alloc this should only try a full reclaim if possible, not unconditionally cc: mesa-stable Part-of: (cherry picked from commit c6635c09d0d7808a959c8e1815516c203e38e7fb) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_bo.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 98922f33f66..da743b8040a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2474,7 +2474,7 @@ "description": "zink: avoid infinite recursion on (very) small BAR systems in bo alloc", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_bo.c b/src/gallium/drivers/zink/zink_bo.c index 7d4fa522b3e..d8a0e5a474c 100644 --- a/src/gallium/drivers/zink/zink_bo.c +++ b/src/gallium/drivers/zink/zink_bo.c @@ -622,6 +622,8 @@ zink_bo_create(struct zink_screen *screen, uint64_t size, unsigned alignment, en low_bound *= 2; //nvidia has fat textures or something unsigned vk_heap_idx = screen->info.mem_props.memoryTypes[mem_type_idx].heapIndex; reclaim_all = screen->info.mem_props.memoryHeaps[vk_heap_idx].size <= low_bound; + if (reclaim_all) + reclaim_all = clean_up_buffer_managers(screen); } entry = pb_slab_alloc_reclaimed(slabs, alloc_size, mem_type_idx, reclaim_all); if (!entry) { From cd582fa0166d94ca5c3f8db5d4ce524eda563a2e Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Tue, 20 Feb 2024 09:05:23 -0500 Subject: [PATCH 31/90] zink: add checks/compat for low-spec descriptor buffer implementations for implementations that can only support 1 descriptor buffer: * prefer templates * allow db if explicitly requested, but disable bindless (for testing) fix #10640 Fixes: b8b51d96b01 ("zink: delete maxDescriptorBufferBindings checks") Part-of: (cherry picked from commit 83d1241cf5be73027531c6c341e4d896b1441792) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_screen.c | 11 +++++++++++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index da743b8040a..8523b07a156 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2314,7 +2314,7 @@ "description": "zink: add checks/compat for low-spec descriptor buffer implementations", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "b8b51d96b0146028ecb5c58703707fe994540119", "notes": null diff --git a/src/gallium/drivers/zink/zink_screen.c b/src/gallium/drivers/zink/zink_screen.c index dacad5cfa82..2c1b6c3ef37 100644 --- a/src/gallium/drivers/zink/zink_screen.c +++ b/src/gallium/drivers/zink/zink_screen.c @@ -837,6 +837,9 @@ zink_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 1; case PIPE_CAP_BINDLESS_TEXTURE: + if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_DB && + (screen->info.db_props.maxDescriptorBufferBindings < 2 || screen->info.db_props.maxSamplerDescriptorBufferBindings < 2)) + return 0; return screen->info.have_EXT_descriptor_indexing; case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: @@ -3465,6 +3468,14 @@ zink_internal_create_screen(const struct pipe_screen_config *config, int64_t dev mesa_logw("zink: bug detected: inputAttachmentDescriptorSize(%u) > %u", (unsigned)screen->info.db_props.inputAttachmentDescriptorSize, ZINK_FBFETCH_DESCRIPTOR_SIZE); can_db = false; } + if (screen->info.db_props.maxDescriptorBufferBindings < 2 || screen->info.db_props.maxSamplerDescriptorBufferBindings < 2) { + if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_DB) { + /* allow for testing, but disable bindless */ + mesa_logw("Cannot use bindless and db descriptor mode with (maxDescriptorBufferBindings||maxSamplerDescriptorBufferBindings) < 2"); + } else { + can_db = false; + } + } } if (zink_descriptor_mode == ZINK_DESCRIPTOR_MODE_AUTO) { /* descriptor buffer is not performant with virt yet */ From 0738409dc7e43d2a574f06b961f237ce7e64353e Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 14 Feb 2024 16:44:11 -0500 Subject: [PATCH 32/90] zink: add a second fence disambiguation case this is the case where: * a batch A is submitted * a no-op flush occurs * the frontend gets the fence from already-flushed batch A * zink recycles batch A * the frontend waits on fence A fixes #10598 cc: mesa-stable Part-of: (cherry picked from commit fb2ae7736f90be7bc3cce3611cff461a5d14693d) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_fence.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 8523b07a156..18de5953882 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2114,7 +2114,7 @@ "description": "zink: add a second fence disambiguation case", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_fence.c b/src/gallium/drivers/zink/zink_fence.c index 33ea9d7d90e..86bc56cf119 100644 --- a/src/gallium/drivers/zink/zink_fence.c +++ b/src/gallium/drivers/zink/zink_fence.c @@ -185,7 +185,12 @@ zink_fence_finish(struct zink_screen *screen, struct pipe_context *pctx, struct if (submit_diff > 1) return true; - if (fence->submitted && zink_screen_check_last_finished(screen, fence->batch_id)) + /* - if fence is submitted, batch_id is nonzero and can be checked + * - if fence is not submitted here, it must be reset; batch_id will be 0 and submitted is false + * in either case, the fence has finished + */ + if ((fence->submitted && zink_screen_check_last_finished(screen, fence->batch_id)) || + (!fence->submitted && submit_diff)) return true; return fence_wait(screen, fence, timeout_ns); From 7426889729c8efc7b2c90dcecd3cdbd361dabd26 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Tue, 20 Feb 2024 16:23:39 -0500 Subject: [PATCH 33/90] zink: force host-visible allocations for MAP_COHERENT resources this fixes persistent maps for systems without any BAR cc: mesa-stable Part-of: (cherry picked from commit ccbf9b0ea7aec6559f8eb872d2da2984c2115453) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_resource.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 18de5953882..1c5bea6a44b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2104,7 +2104,7 @@ "description": "zink: force host-visible allocations for MAP_COHERENT resources", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_resource.c b/src/gallium/drivers/zink/zink_resource.c index 0c692cff6e9..14f4e34351b 100644 --- a/src/gallium/drivers/zink/zink_resource.c +++ b/src/gallium/drivers/zink/zink_resource.c @@ -1181,6 +1181,10 @@ resource_object_create(struct zink_screen *screen, const struct pipe_resource *t mai.pNext = NULL; mai.allocationSize = reqs.size; enum zink_heap heap = zink_heap_from_domain_flags(flags, aflags); + if (templ->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) { + if (!(vk_domain_from_heap(heap) & VK_MEMORY_PROPERTY_HOST_COHERENT_BIT)) + heap = zink_heap_from_domain_flags(flags & ~VK_MEMORY_PROPERTY_DEVICE_LOCAL_BIT, aflags); + } VkMemoryDedicatedAllocateInfo ded_alloc_info = { .sType = VK_STRUCTURE_TYPE_MEMORY_DEDICATED_ALLOCATE_INFO, From 40c72e73e7d4e148dc76c5c6be09b8182c38fcc3 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 21 Feb 2024 12:03:12 -0500 Subject: [PATCH 34/90] zink: handle stencil_fallback in zink_clear_depth_stencil ctx->blitting will already be set at this point, meaning the flag should not be modified and no barriers are required fixes stencil blitting on nvk cc: mesa-stable Part-of: (cherry picked from commit ac45d893d62eeae7525953d1b36c4f3f93a6b01e) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_clear.c | 14 +++++++++----- 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 1c5bea6a44b..3e12c076889 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1634,7 +1634,7 @@ "description": "zink: handle stencil_fallback in zink_clear_depth_stencil", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_clear.c b/src/gallium/drivers/zink/zink_clear.c index dc2ca1d1c11..c417b62c811 100644 --- a/src/gallium/drivers/zink/zink_clear.c +++ b/src/gallium/drivers/zink/zink_clear.c @@ -644,6 +644,8 @@ zink_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *dst, bool render_condition_enabled) { struct zink_context *ctx = zink_context(pctx); + /* check for stencil fallback */ + bool blitting = ctx->blitting; zink_flush_dgc_if_enabled(ctx); bool render_condition_active = ctx->render_condition_active; if (!render_condition_enabled && render_condition_active) { @@ -656,14 +658,16 @@ zink_clear_depth_stencil(struct pipe_context *pctx, struct pipe_surface *dst, dsty + height > ctx->fb_state.height) cur_attachment = false; if (!cur_attachment) { - util_blitter_save_framebuffer(ctx->blitter, &ctx->fb_state); - set_clear_fb(pctx, NULL, dst); - zink_blit_barriers(ctx, NULL, zink_resource(dst->texture), false); - ctx->blitting = true; + if (!blitting) { + util_blitter_save_framebuffer(ctx->blitter, &ctx->fb_state); + set_clear_fb(pctx, NULL, dst); + zink_blit_barriers(ctx, NULL, zink_resource(dst->texture), false); + ctx->blitting = true; + } } struct pipe_scissor_state scissor = {dstx, dsty, dstx + width, dsty + height}; pctx->clear(pctx, clear_flags, &scissor, NULL, depth, stencil); - if (!cur_attachment) { + if (!cur_attachment && !blitting) { util_blitter_restore_fb_state(ctx->blitter); ctx->blitting = false; } From 3794d15e617a310c5907b4903831893b1367c165 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 22 Feb 2024 09:19:35 -0500 Subject: [PATCH 35/90] zink: don't destroy the current batch state on context destroy these are owned by the screen now should fix some flakiness with shared contexts Fixes: b06f6e00fba ("zink: fix heap-use-after-free on batch_state with sub-allocated pipe_resources") Part-of: (cherry picked from commit dfe331930c63a5a245b90740061d47a174eb10eb) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_context.c | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 3e12c076889..c537f139cea 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1254,7 +1254,7 @@ "description": "zink: don't destroy the current batch state on context destroy", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "b06f6e00fba6e33c28a198a1bb14b89e9dfbb4ae", "notes": null diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 0a8c44e837b..6616be2f612 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -187,21 +187,31 @@ zink_context_destroy(struct pipe_context *pctx) screen->free_batch_states = ctx->batch_states; screen->last_free_batch_state = screen->free_batch_states; } - while (screen->last_free_batch_state->next) - screen->last_free_batch_state = screen->last_free_batch_state->next; } + while (screen->last_free_batch_state && screen->last_free_batch_state->next) + screen->last_free_batch_state = screen->last_free_batch_state->next; if (ctx->free_batch_states) { if (screen->free_batch_states) screen->last_free_batch_state->next = ctx->free_batch_states; - else + else { screen->free_batch_states = ctx->free_batch_states; - screen->last_free_batch_state = ctx->last_free_batch_state; + screen->last_free_batch_state = ctx->last_free_batch_state; + } } - simple_mtx_unlock(&screen->free_batch_states_lock); + while (screen->last_free_batch_state && screen->last_free_batch_state->next) + screen->last_free_batch_state = screen->last_free_batch_state->next; if (ctx->batch.state) { zink_clear_batch_state(ctx, ctx->batch.state); - zink_batch_state_destroy(screen, ctx->batch.state); + if (screen->free_batch_states) + screen->last_free_batch_state->next = ctx->batch.state; + else { + screen->free_batch_states = ctx->batch.state; + screen->last_free_batch_state = screen->free_batch_states; + } } + while (screen->last_free_batch_state && screen->last_free_batch_state->next) + screen->last_free_batch_state = screen->last_free_batch_state->next; + simple_mtx_unlock(&screen->free_batch_states_lock); for (unsigned i = 0; i < 2; i++) { util_idalloc_fini(&ctx->di.bindless[i].tex_slots); From 2166ee5c2ebf61391dcbbd2a4e13c3c67b53a67b Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Thu, 22 Feb 2024 17:36:10 +0100 Subject: [PATCH 36/90] zink: lower unaligned memory accesses Fixes `vload_half` in OpenCL Fixes: 0288cb0a0c4 ("zink: lower vec8/16") Signed-off-by: Karol Herbst Part-of: (cherry picked from commit 2b9c0e376816e44f665473704128f293986a7ba1) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_compiler.c | 19 ++++++++++++++----- 2 files changed, 15 insertions(+), 6 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index c537f139cea..03d53f74ae2 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1154,7 +1154,7 @@ "description": "zink: lower unaligned memory accesses", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "0288cb0a0c471fbef07d1dfc1cae843c5396d8e1", "notes": null diff --git a/src/gallium/drivers/zink/zink_compiler.c b/src/gallium/drivers/zink/zink_compiler.c index d487de5443b..203c7a6292c 100644 --- a/src/gallium/drivers/zink/zink_compiler.c +++ b/src/gallium/drivers/zink/zink_compiler.c @@ -5302,11 +5302,20 @@ mem_access_size_align_cb(nir_intrinsic_op intrin, uint8_t bytes, assert(util_is_power_of_two_nonzero(align)); - return (nir_mem_access_size_align){ - .num_components = MIN2(bytes / (bit_size / 8), 4), - .bit_size = bit_size, - .align = bit_size / 8, - }; + /* simply drop the bit_size for unaligned load/stores */ + if (align < (bit_size / 8)) { + return (nir_mem_access_size_align){ + .num_components = MIN2(bytes / align, 4), + .bit_size = align * 8, + .align = align, + }; + } else { + return (nir_mem_access_size_align){ + .num_components = MIN2(bytes / (bit_size / 8), 4), + .bit_size = bit_size, + .align = bit_size / 8, + }; + } } static nir_mem_access_size_align From f36d69d1d6708e7c9120ef81eb5f248c87b5495e Mon Sep 17 00:00:00 2001 From: Hans-Kristian Arntzen Date: Wed, 14 Feb 2024 12:53:58 +0100 Subject: [PATCH 37/90] radv: export multiview in VS/TES/GS for depth-only rendering For depth-only rendering, a VS would not export layer properly. Signed-off-by: Hans-Kristian Arntzen Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10606 Reviewed-by: Samuel Pitoiset cc: mesa-stable Part-of: (cherry picked from commit 786c1b8322d96b9cf8d39403e9e868030a73323d) --- .pick_status.json | 2 +- src/amd/vulkan/radv_pipeline_graphics.c | 7 ++++--- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 03d53f74ae2..fa133665146 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3594,7 +3594,7 @@ "description": "radv: export multiview in VS/TES/GS for depth-only rendering", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c index bdb02754d46..ba6b167551a 100644 --- a/src/amd/vulkan/radv_pipeline_graphics.c +++ b/src/amd/vulkan/radv_pipeline_graphics.c @@ -1178,11 +1178,12 @@ get_vs_output_info(const struct radv_graphics_pipeline *pipeline) static bool radv_should_export_multiview(const struct radv_shader_stage *stage, const struct radv_pipeline_key *pipeline_key) { - /* Export the layer in the last VGT stage if multiview is used. When the next stage is unknown - * (with graphics pipeline library), the layer is exported unconditionally. + /* Export the layer in the last VGT stage if multiview is used. + * Also checks for NONE stage, which happens when we have depth-only rendering. + * When the next stage is unknown (with graphics pipeline library), the layer is exported unconditionally. */ return pipeline_key->has_multiview_view_index && - (stage->info.next_stage == MESA_SHADER_FRAGMENT || + (stage->info.next_stage == MESA_SHADER_FRAGMENT || stage->info.next_stage == MESA_SHADER_NONE || !(pipeline_key->lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT)) && !(stage->nir->info.outputs_written & VARYING_BIT_LAYER); } From abd5842ed7ba3268a405089cee12ed54649ec3e4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pavel=20Ondra=C4=8Dka?= Date: Sun, 4 Feb 2024 21:55:09 +0100 Subject: [PATCH 38/90] r300: add explicit flrp lowering MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Even though we set .lower_flrp32 = true there is no actuall flrp lowering in nir_opt_algebraic. Mesa does not produce any but nine does, so lower it explicitly to fix nine. Fixes: f8a5cba3b4265ccf088c05d9d44f36f42c961e0b Signed-off-by: Pavel Ondračka Reviewed-by: Filip Gawin Part-of: (cherry picked from commit d78a913bda8cec60553c515cd106ff2a9b8b6d27) --- .pick_status.json | 2 +- src/gallium/drivers/r300/compiler/r300_nir.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index fa133665146..fe559b8cc70 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3544,7 +3544,7 @@ "description": "r300: add explicit flrp lowering", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "f8a5cba3b4265ccf088c05d9d44f36f42c961e0b", "notes": null diff --git a/src/gallium/drivers/r300/compiler/r300_nir.c b/src/gallium/drivers/r300/compiler/r300_nir.c index 1fc240fa7b5..d87e6c165c2 100644 --- a/src/gallium/drivers/r300/compiler/r300_nir.c +++ b/src/gallium/drivers/r300/compiler/r300_nir.c @@ -80,6 +80,7 @@ r300_optimize_nir(struct nir_shader *s, struct pipe_screen *screen) NIR_PASS_V(s, nir_lower_vars_to_ssa); NIR_PASS(progress, s, nir_copy_prop); + NIR_PASS(progress, s, r300_nir_lower_flrp); NIR_PASS(progress, s, nir_opt_algebraic); if (s->info.stage == MESA_SHADER_VERTEX) { if (!is_r500) From 8a338675c67b8a7f3c4a8bca272b3b89850c6fd4 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 14 Feb 2024 16:54:50 +0000 Subject: [PATCH 39/90] radv: enable GS_FAST_LAUNCH=2 by default for RDNA3 APUs (Phoenix) GS_FAST_LAUNCH=1 shouldn't be used on GFX11 but it's still needed for dGPUs (eg. NAVI31) because it destroys performance for unknown reasons. On RDNA3 APUs, GS_FAST_LAUNCH=2 seems to be required for working mesh shaders and performance is fine. There is possibly a firmware bug on APUs that would explain why GS_FAST_LAUNCH=1 doesn't work on Phoenix. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10583 Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10397 Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 6894692d270f7c49b1e4cb2d15dad94de4e3acb0) --- .pick_status.json | 2 +- docs/envvars.rst | 2 +- src/amd/vulkan/radv_device.c | 13 +++++++++++-- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index fe559b8cc70..deec463d46f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3094,7 +3094,7 @@ "description": "radv: enable GS_FAST_LAUNCH=2 by default for RDNA3 APUs (Phoenix)", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/docs/envvars.rst b/docs/envvars.rst index 300f2cd40e1..a6af0532467 100644 --- a/docs/envvars.rst +++ b/docs/envvars.rst @@ -1357,7 +1357,7 @@ RADV driver environment variables ``video_decode`` enable experimental video decoding support ``gsfastlaunch2`` - use GS_FAST_LAUNCH=2 for Mesh shaders (GFX11+) + use GS_FAST_LAUNCH=2 for Mesh shaders (GFX11+ dGPUs only) .. envvar:: RADV_TEX_ANISO diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 261cf4f6856..61dd5ebc791 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1001,8 +1001,17 @@ radv_CreateDevice(VkPhysicalDevice physicalDevice, const VkDeviceCreateInfo *pCr device->pbb_allowed = device->physical_device->rad_info.gfx_level >= GFX9 && !(device->instance->debug_flags & RADV_DEBUG_NOBINNING); - device->mesh_fast_launch_2 = (device->instance->perftest_flags & RADV_PERFTEST_GS_FAST_LAUNCH_2) && - device->physical_device->rad_info.gfx_level >= GFX11; + /* GS_FAST_LAUNCH=2 mode is supposed to be used on GFX11 but it turns + * out it has severe impact on performance for unknown reasons (tested on + * NAVI31 dGPU). It's disabled by default. + * + * On RDNA3 APUs (Phoenix) it turns GS_FAST_LAUNCH=1 doesn't work at all, + * and using mode2 fixes everything without any performance impact. + */ + device->mesh_fast_launch_2 = ((device->instance->perftest_flags & RADV_PERFTEST_GS_FAST_LAUNCH_2) && + device->physical_device->rad_info.gfx_level >= GFX11) || + device->physical_device->rad_info.family == CHIP_GFX1103_R1 || + device->physical_device->rad_info.family == CHIP_GFX1103_R2; device->disable_trunc_coord = device->instance->drirc.disable_trunc_coord; From a85301784d695f563a9e1e7c694ff1368a62fda9 Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Thu, 15 Feb 2024 13:57:33 +0100 Subject: [PATCH 40/90] rusticl/program: fix CL_PROGRAM_BINARIES for devs with no builds Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10611 Fixes: e028baa1772 ("rusticl/program: implement clCreateProgramWithBinary") Signed-off-by: Karol Herbst Part-of: (cherry picked from commit a4f77ce2d417f0a7b445d51b7bfe33c5b6fe4322) --- .pick_status.json | 2 +- src/gallium/frontends/rusticl/core/program.rs | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index deec463d46f..baa2c3f0468 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3084,7 +3084,7 @@ "description": "rusticl/program: fix CL_PROGRAM_BINARIES for devs with no builds", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e028baa1772eeaa55393b1d01d5e5fb217474f95", "notes": null diff --git a/src/gallium/frontends/rusticl/core/program.rs b/src/gallium/frontends/rusticl/core/program.rs index eeb9c113538..68abe86aa4c 100644 --- a/src/gallium/frontends/rusticl/core/program.rs +++ b/src/gallium/frontends/rusticl/core/program.rs @@ -505,7 +505,12 @@ impl Program { for (i, d) in self.devs.iter().enumerate() { let mut ptr = ptrs[i]; let info = lock.dev_build(d); - let spirv = info.spirv.as_ref().unwrap().to_bin(); + + // no spirv means nothing to write + let Some(spirv) = info.spirv.as_ref() else { + continue; + }; + let spirv = spirv.to_bin(); unsafe { // 1. binary format version From 519c96f3c8200b080b120a50015820d275164113 Mon Sep 17 00:00:00 2001 From: Boyuan Zhang Date: Thu, 15 Feb 2024 14:00:52 -0500 Subject: [PATCH 41/90] radeonsi/vcn: only use multi slices reflist when available Some frontends interface doesn't provide ref pic lists for HEVC. Therefore ONLY enabling multislices reflist for frontends that support direct ref pic list by checking the flag. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10599 Cc: mesa-stable Signed-off-by: Boyuan Zhang Reviewed-by: Leo Liu Part-of: (cherry picked from commit 0db2d13af1a7f04f8461691db062b9111efae6df) --- .pick_status.json | 2 +- src/gallium/drivers/radeonsi/radeon_vcn_dec.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index baa2c3f0468..a5c5f882397 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -3034,7 +3034,7 @@ "description": "radeonsi/vcn: only use multi slices reflist when available", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/radeonsi/radeon_vcn_dec.c b/src/gallium/drivers/radeonsi/radeon_vcn_dec.c index c6fa84af78a..6d19d84c47f 100644 --- a/src/gallium/drivers/radeonsi/radeon_vcn_dec.c +++ b/src/gallium/drivers/radeonsi/radeon_vcn_dec.c @@ -307,15 +307,15 @@ static rvcn_dec_message_hevc_t get_h265_msg(struct radeon_decoder *dec, result.sps_info_flags |= pic->pps->sps->separate_colour_plane_flag << 8; if (((struct si_screen *)dec->screen)->info.family == CHIP_CARRIZO) result.sps_info_flags |= 1 << 9; - if (pic->UseRefPicList == true) + if (pic->UseRefPicList == true) { result.sps_info_flags |= 1 << 10; + result.sps_info_flags |= 1 << 12; + } if (pic->UseStRpsBits == true && pic->pps->st_rps_bits != 0) { result.sps_info_flags |= 1 << 11; result.st_rps_bits = pic->pps->st_rps_bits; } - result.sps_info_flags |= 1 << 12; - result.chroma_format = pic->pps->sps->chroma_format_idc; result.bit_depth_luma_minus8 = pic->pps->sps->bit_depth_luma_minus8; result.bit_depth_chroma_minus8 = pic->pps->sps->bit_depth_chroma_minus8; From c126631fe7eef355629560881ccffc2d98a9eb02 Mon Sep 17 00:00:00 2001 From: Chia-I Wu Date: Thu, 15 Feb 2024 18:09:41 -0800 Subject: [PATCH 42/90] radv: fix pipeline stats mask Left-shifting by 11*8 or 14*8 is undefined. This fixes many dEQP-VK.query_pool.statistics_query.* failures (but not pre-existing flakes) for release builds using clang. Fixes: 48aabaf225f ("radv: do not harcode the pipeline stats mask for query resolves") Part-of: (cherry picked from commit ec5d0ffb04fe8643f9e248bf8530aa89c46f3e02) --- .pick_status.json | 2 +- src/amd/vulkan/radv_query.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a5c5f882397..f7f4d7d6aeb 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2994,7 +2994,7 @@ "description": "radv: fix pipeline stats mask", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "48aabaf225f3ebf0bada2fe820d2c0f6288a3ca5", "notes": null diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index 0a215ba761d..df50f969f5e 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -1155,7 +1155,7 @@ radv_query_shader(struct radv_cmd_buffer *cmd_buffer, VkPipeline *pipeline, stru .range = VK_WHOLE_SIZE}}}); /* Encode the number of elements for easy access by the shader. */ - pipeline_stats_mask &= (1 << radv_get_pipelinestat_query_size(device)) - 1; + pipeline_stats_mask &= (1 << (radv_get_pipelinestat_query_size(device) / 8)) - 1; pipeline_stats_mask |= util_bitcount(pipeline_stats_mask) << 16; avail_offset -= src_offset; From e814fc81b03b9380e70a3a3c47b011e0df449b94 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 14 Feb 2024 13:35:38 -0500 Subject: [PATCH 43/90] mesa: check driver format support for certain GetInternalformativ queries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit according to spec, these should return NONE if the format is not supported for a given texture target, but mesa was incorrectly returning a hardcoded value for all cases without checking the driver instead, check whether the driver can create a texture for a given format to correctly handle this non-support case cc: mesa-stable Reviewed-by: Jesse Natalie Reviewed-by: Marek Olšák Part-of: (cherry picked from commit 893780b36251616e967f12354fab5fc0d05d79d7) --- .pick_status.json | 2 +- src/mesa/main/formatquery.c | 26 ++++++++++++++++++ src/mesa/state_tracker/st_format.c | 43 ++++++++++++++++++++++++++++++ src/mesa/state_tracker/st_format.h | 3 ++- 4 files changed, 72 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index f7f4d7d6aeb..fb616ef0b4e 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2754,7 +2754,7 @@ "description": "mesa: check driver format support for certain GetInternalformativ queries", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/mesa/main/formatquery.c b/src/mesa/main/formatquery.c index ae59413d345..396fa0a4014 100644 --- a/src/mesa/main/formatquery.c +++ b/src/mesa/main/formatquery.c @@ -1112,6 +1112,12 @@ _mesa_GetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, if (get_pname == 0) goto end; + /* if the resource is unsupported, zero is returned */ + if (!st_QueryTextureFormatSupport(ctx, target, internalformat)) { + buffer[0] = 0; + break; + } + _mesa_GetIntegerv(get_pname, buffer); break; } @@ -1123,6 +1129,12 @@ _mesa_GetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, if (!_mesa_is_array_texture(target)) goto end; + /* if the resource is unsupported, zero is returned */ + if (!st_QueryTextureFormatSupport(ctx, target, internalformat)) { + buffer[0] = 0; + break; + } + _mesa_GetIntegerv(GL_MAX_ARRAY_TEXTURE_LAYERS, buffer); break; @@ -1137,6 +1149,12 @@ _mesa_GetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, unsigned i; GLint current_value; + /* if the resource is unsupported, zero is returned */ + if (!st_QueryTextureFormatSupport(ctx, target, internalformat)) { + buffer[0] = 0; + break; + } + /* Combining the dimensions. Note that for array targets, this would * automatically include the value of MAX_LAYERS, as that value is * returned as MAX_HEIGHT or MAX_DEPTH */ @@ -1515,6 +1533,14 @@ _mesa_GetInternalformativ(GLenum target, GLenum internalformat, GLenum pname, if (targetIndex < 0 || targetIndex == TEXTURE_BUFFER_INDEX) goto end; + /* If the resource is not supported for image textures, + * or if image textures are not supported, NONE is returned. + */ + if (!st_QueryTextureFormatSupport(ctx, target, internalformat)) { + buffer[0] = GL_NONE; + break; + } + /* From spec: "Equivalent to calling GetTexParameter with set * to IMAGE_FORMAT_COMPATIBILITY_TYPE." * diff --git a/src/mesa/state_tracker/st_format.c b/src/mesa/state_tracker/st_format.c index 6dcd5db202f..e2af7724608 100644 --- a/src/mesa/state_tracker/st_format.c +++ b/src/mesa/state_tracker/st_format.c @@ -1507,6 +1507,49 @@ st_QuerySamplesForFormat(struct gl_context *ctx, GLenum target, return num_sample_counts; } +/* check whether any texture can be allocated for a given format */ +bool +st_QueryTextureFormatSupport(struct gl_context *ctx, GLenum target, GLenum internalFormat) +{ + struct st_context *st = st_context(ctx); + + /* If an sRGB framebuffer is unsupported, sRGB formats behave like linear + * formats. + */ + if (!ctx->Extensions.EXT_sRGB) { + internalFormat = _mesa_get_linear_internalformat(internalFormat); + } + + /* multisample textures need >= 2 samples */ + unsigned min_samples = target == GL_TEXTURE_2D_MULTISAMPLE || + target == GL_TEXTURE_2D_MULTISAMPLE_ARRAY ? 1 : 0; + unsigned max_samples = min_samples ? 16 : 1; + + /* compressed textures will be allocated as e.g., RGBA8, so check that instead */ + enum pipe_format pf = st_choose_format(st, internalFormat, GL_NONE, GL_NONE, + PIPE_TEXTURE_2D, 0, 0, 0, + false, false); + if (util_format_is_compressed(pf)) { + enum pipe_format fmts[2] = {0}; + pf = st_mesa_format_to_pipe_format(st, st_pipe_format_to_mesa_format(pf)); + fmts[0] = pf; + for (unsigned i = max_samples; i > min_samples; i >>= 1) { + if (find_supported_format(st->screen, fmts, PIPE_TEXTURE_2D, + i, i, PIPE_BIND_SAMPLER_VIEW, false)) + return true; + } + return false; + } + for (unsigned i = max_samples; i > min_samples; i >>= 1) { + if (st_choose_format(st, internalFormat, GL_NONE, GL_NONE, + PIPE_TEXTURE_2D, i, i, PIPE_BIND_SAMPLER_VIEW, + false, false)) + return true; + } + + return false; +} + /** * ARB_internalformat_query2 driver hook. diff --git a/src/mesa/state_tracker/st_format.h b/src/mesa/state_tracker/st_format.h index 9692a0bc583..21b1a7bb4bf 100644 --- a/src/mesa/state_tracker/st_format.h +++ b/src/mesa/state_tracker/st_format.h @@ -70,7 +70,8 @@ extern mesa_format st_ChooseTextureFormat(struct gl_context * ctx, GLenum target, GLint internalFormat, GLenum format, GLenum type); - +bool +st_QueryTextureFormatSupport(struct gl_context *ctx, GLenum target, GLenum internalFormat); void st_QueryInternalFormat(struct gl_context *ctx, GLenum target, GLenum internalFormat, GLenum pname, GLint *params); From 2128a8a07b5d1fa91dbf799c63f1c452d942d89b Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 7 Feb 2024 10:16:57 +0200 Subject: [PATCH 44/90] anv: fixup push descriptor shader analysis There are a couple mistakes here : - using a bitfield as an index to generate a bitfield... - in anv_nir_push_desc_ubo_fully_promoted(), confusing binding table access of the descriptor buffer with actual descriptors Signed-off-by: Lionel Landwerlin Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache") Reviewed-by: Ivan Briano Part-of: (cherry picked from commit cf193af7626d70062f3814e3111d66959afc523f) --- .pick_status.json | 2 +- src/intel/compiler/brw_nir.h | 26 +++++- .../vulkan/anv_nir_push_descriptor_analysis.c | 90 ++++++++++++------- src/intel/vulkan/anv_pipeline.c | 2 +- 4 files changed, 81 insertions(+), 39 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index fb616ef0b4e..9f8ec32da89 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2714,7 +2714,7 @@ "description": "anv: fixup push descriptor shader analysis", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "ff91c5ca42bc80aa411cb3fd8f550aa6fdd16bdc", "notes": null diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index 119de1c6086..7d8870732ad 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -122,8 +122,7 @@ brw_nir_ubo_surface_index_is_pushable(nir_src src) if (intrin && intrin->intrinsic == nir_intrinsic_resource_intel) { return (nir_intrinsic_resource_access_intel(intrin) & - nir_resource_intel_pushable) && - nir_src_is_const(intrin->src[1]); + nir_resource_intel_pushable); } return nir_src_is_const(src); @@ -146,6 +145,14 @@ brw_nir_ubo_surface_index_get_push_block(nir_src src) return nir_intrinsic_resource_block_intel(intrin); } +/* This helper return the binding table index of a surface access (any + * buffer/image/etc...). It works off the source of one of the intrinsics + * (load_ubo, load_ssbo, store_ssbo, load_image, store_image, etc...). + * + * If the source is constant, then this is the binding table index. If we're + * going through a resource_intel intel intrinsic, then we need to check + * src[1] of that intrinsic. + */ static inline unsigned brw_nir_ubo_surface_index_get_bti(nir_src src) { @@ -155,8 +162,19 @@ brw_nir_ubo_surface_index_get_bti(nir_src src) assert(src.ssa->parent_instr->type == nir_instr_type_intrinsic); nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(src.ssa->parent_instr); - assert(intrin->intrinsic == nir_intrinsic_resource_intel); - assert(nir_src_is_const(intrin->src[1])); + if (!intrin || intrin->intrinsic != nir_intrinsic_resource_intel) + return UINT32_MAX; + + /* In practice we could even drop this intrinsic because the bindless + * access always operate from a base offset coming from a push constant, so + * they can never be constant. + */ + if (nir_intrinsic_resource_access_intel(intrin) & + nir_resource_intel_bindless) + return UINT32_MAX; + + if (!nir_src_is_const(intrin->src[1])) + return UINT32_MAX; return nir_src_as_uint(intrin->src[1]); } diff --git a/src/intel/vulkan/anv_nir_push_descriptor_analysis.c b/src/intel/vulkan/anv_nir_push_descriptor_analysis.c index 2e1c75dbd75..62eb6088381 100644 --- a/src/intel/vulkan/anv_nir_push_descriptor_analysis.c +++ b/src/intel/vulkan/anv_nir_push_descriptor_analysis.c @@ -126,18 +126,17 @@ anv_nir_loads_push_desc_buffer(nir_shader *nir, if (intrin->intrinsic != nir_intrinsic_load_ubo) continue; - const nir_const_value *const_bt_idx = - nir_src_as_const_value(intrin->src[0]); - if (const_bt_idx == NULL) + const unsigned bt_idx = + brw_nir_ubo_surface_index_get_bti(intrin->src[0]); + if (bt_idx == UINT32_MAX) continue; - const unsigned bt_idx = const_bt_idx[0].u32; - const struct anv_pipeline_binding *binding = &bind_map->surface_to_descriptor[bt_idx]; if (binding->set == ANV_DESCRIPTOR_SET_DESCRIPTORS && - binding->index == push_set) + binding->index == push_set) { return true; + } } } } @@ -162,6 +161,7 @@ anv_nir_push_desc_ubo_fully_promoted(nir_shader *nir, if (push_set_layout == NULL) return 0; + /* Assume every UBO can be promoted first. */ uint32_t ubos_fully_promoted = 0; for (uint32_t b = 0; b < push_set_layout->binding_count; b++) { const struct anv_descriptor_set_binding_layout *bind_layout = @@ -174,6 +174,10 @@ anv_nir_push_desc_ubo_fully_promoted(nir_shader *nir, ubos_fully_promoted |= BITFIELD_BIT(bind_layout->descriptor_index); } + /* For each load_ubo intrinsic, if the descriptor index or the offset is + * not a constant, we could not promote to push constant. Then check the + * offset + size against the push ranges. + */ nir_foreach_function_impl(impl, nir) { nir_foreach_block(block, impl) { nir_foreach_instr(instr, block) { @@ -184,45 +188,65 @@ anv_nir_push_desc_ubo_fully_promoted(nir_shader *nir, if (intrin->intrinsic != nir_intrinsic_load_ubo) continue; - if (!brw_nir_ubo_surface_index_is_pushable(intrin->src[0])) + /* Don't check the load_ubo from descriptor buffers */ + nir_intrinsic_instr *resource = + intrin->src[0].ssa->parent_instr->type == nir_instr_type_intrinsic ? + nir_instr_as_intrinsic(intrin->src[0].ssa->parent_instr) : NULL; + if (resource == NULL || resource->intrinsic != nir_intrinsic_resource_intel) continue; - const unsigned bt_idx = - brw_nir_ubo_surface_index_get_bti(intrin->src[0]); - - /* Skip if this isn't a load from push descriptor buffer. */ - const struct anv_pipeline_binding *binding = - &bind_map->surface_to_descriptor[bt_idx]; - if (binding->set != push_set) + /* Skip load_ubo not loading from the push descriptor */ + if (nir_intrinsic_desc_set(resource) != push_set) continue; + uint32_t binding = nir_intrinsic_binding(resource); + + /* If we have indirect indexing in the binding, no push promotion + * in possible for the entire binding. + */ + if (!nir_src_is_const(resource->src[1])) { + for (uint32_t i = 0; i < push_set_layout->binding[binding].array_size; i++) { + ubos_fully_promoted &= + ~BITFIELD_BIT(push_set_layout->binding[binding].descriptor_index + i); + } + continue; + } + + const nir_const_value *const_bt_id = + nir_src_as_const_value(resource->src[1]); + uint32_t bt_id = const_bt_id[0].u32; + + const struct anv_pipeline_binding *pipe_bind = + &bind_map->surface_to_descriptor[bt_id]; + const uint32_t desc_idx = - push_set_layout->binding[binding->binding].descriptor_index; - assert(desc_idx < MAX_PUSH_DESCRIPTORS); - - bool promoted = false; + push_set_layout->binding[binding].descriptor_index; /* If the offset in the entry is dynamic, we can't tell if * promoted or not. */ const nir_const_value *const_load_offset = nir_src_as_const_value(intrin->src[1]); - if (const_load_offset != NULL) { - /* Check if the load was promoted to a push constant. */ - const unsigned load_offset = const_load_offset[0].u32; - const int load_bytes = nir_intrinsic_dest_components(intrin) * - (intrin->def.bit_size / 8); + if (const_load_offset == NULL) { + ubos_fully_promoted &= ~BITFIELD_BIT(desc_idx); + continue; + } - for (unsigned i = 0; i < ARRAY_SIZE(bind_map->push_ranges); i++) { - if (bind_map->push_ranges[i].set == binding->set && - bind_map->push_ranges[i].index == desc_idx && - bind_map->push_ranges[i].start * 32 <= load_offset && - (bind_map->push_ranges[i].start + - bind_map->push_ranges[i].length) * 32 >= - (load_offset + load_bytes)) { - promoted = true; - break; - } + /* Check if the load was promoted to a push constant. */ + const unsigned load_offset = const_load_offset[0].u32; + const int load_bytes = nir_intrinsic_dest_components(intrin) * + (intrin->def.bit_size / 8); + + bool promoted = false; + for (unsigned i = 0; i < ARRAY_SIZE(bind_map->push_ranges); i++) { + if (bind_map->push_ranges[i].set == pipe_bind->set && + bind_map->push_ranges[i].index == desc_idx && + bind_map->push_ranges[i].start * 32 <= load_offset && + (bind_map->push_ranges[i].start + + bind_map->push_ranges[i].length) * 32 >= + (load_offset + load_bytes)) { + promoted = true; + break; } } diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index fe08cf44b71..fcf57756c3a 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -1728,7 +1728,7 @@ anv_pipeline_account_shader(struct anv_pipeline *pipeline, if (shader->push_desc_info.used_set_buffer) { pipeline->use_push_descriptor_buffer |= - BITFIELD_BIT(mesa_to_vk_shader_stage(shader->stage)); + mesa_to_vk_shader_stage(shader->stage); } if (shader->push_desc_info.used_descriptors & ~shader->push_desc_info.fully_promoted_ubo_descriptors) From 71442fdd6f4fec29a2d3dd6a4c2fbe6771c8f766 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 7 Feb 2024 10:20:41 +0200 Subject: [PATCH 45/90] anv: reenable ANV_ALWAYS_BINDLESS Signed-off-by: Lionel Landwerlin Cc: mesa-stable Reviewed-by: Ivan Briano Part-of: (cherry picked from commit 27a7c5447ddd3cf344ace982ba9a1b8beb58fb0c) --- .pick_status.json | 2 +- .../vulkan/anv_nir_apply_pipeline_layout.c | 32 +++++++++++++++++-- 2 files changed, 31 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 9f8ec32da89..e84f6469c18 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2694,7 +2694,7 @@ "description": "anv: reenable ANV_ALWAYS_BINDLESS", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c index e55e4e51391..2c35623e963 100644 --- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c +++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c @@ -1975,6 +1975,34 @@ add_push_entry(struct anv_pipeline_push_map *push_map, }; } +static bool +binding_should_use_surface_binding_table(const struct apply_pipeline_layout_state *state, + const struct anv_descriptor_set_binding_layout *binding) +{ + if ((binding->data & ANV_DESCRIPTOR_BTI_SURFACE_STATE) == 0) + return false; + + if (state->pdevice->always_use_bindless && + (binding->data & ANV_DESCRIPTOR_SURFACE)) + return false; + + return true; +} + +static bool +binding_should_use_sampler_binding_table(const struct apply_pipeline_layout_state *state, + const struct anv_descriptor_set_binding_layout *binding) +{ + if ((binding->data & ANV_DESCRIPTOR_BTI_SAMPLER_STATE) == 0) + return false; + + if (state->pdevice->always_use_bindless && + (binding->data & ANV_DESCRIPTOR_SAMPLER)) + return false; + + return true; +} + void anv_nir_apply_pipeline_layout(nir_shader *shader, const struct anv_physical_device *pdevice, @@ -2146,7 +2174,7 @@ anv_nir_apply_pipeline_layout(nir_shader *shader, state.set[set].binding[b].surface_offset = BINDLESS_OFFSET; state.set[set].binding[b].sampler_offset = BINDLESS_OFFSET; - if (binding->data & ANV_DESCRIPTOR_BTI_SURFACE_STATE) { + if (binding_should_use_surface_binding_table(&state, binding)) { if (map->surface_count + array_size * array_multiplier > MAX_BINDING_TABLE_SIZE || anv_descriptor_requires_bindless(pdevice, binding, false) || brw_shader_stage_requires_bindless_resources(shader->info.stage)) { @@ -2177,7 +2205,7 @@ anv_nir_apply_pipeline_layout(nir_shader *shader, assert(map->surface_count <= MAX_BINDING_TABLE_SIZE); } - if (binding->data & ANV_DESCRIPTOR_BTI_SAMPLER_STATE) { + if (binding_should_use_sampler_binding_table(&state, binding)) { if (map->sampler_count + array_size * array_multiplier > MAX_SAMPLER_TABLE_SIZE || anv_descriptor_requires_bindless(pdevice, binding, true) || brw_shader_stage_requires_bindless_resources(shader->info.stage)) { From 8dd90997d7285f2e97ff266fe8c4b81370cc90d4 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 15 Feb 2024 17:57:55 +0200 Subject: [PATCH 46/90] anv: fix Wa_16013994831 macros MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The commit that switched to the WA framework forgot to update one of the ifdef section. Signed-off-by: Lionel Landwerlin Fixes: e6e320fc79 ("anv: make Wa_16013994831 to use intel_needs_workaround") Reviewed-by: Tapani Pälli Part-of: (cherry picked from commit 63676ed5023b45fa2e6a79debb047af69d2cd75f) --- .pick_status.json | 2 +- src/intel/vulkan/genX_gfx_state.c | 2 +- src/intel/vulkan/genX_gpu_memcpy.c | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index e84f6469c18..37108f61c24 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2674,7 +2674,7 @@ "description": "anv: fix Wa_16013994831 macros", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e6e320fc7996db60231d277bc3e28fdd01018b33", "notes": null diff --git a/src/intel/vulkan/genX_gfx_state.c b/src/intel/vulkan/genX_gfx_state.c index 66af91f8f62..ab6b87e4983 100644 --- a/src/intel/vulkan/genX_gfx_state.c +++ b/src/intel/vulkan/genX_gfx_state.c @@ -68,7 +68,7 @@ static const uint32_t genX(vk_to_intel_blend_op)[] = { static void genX(streamout_prologue)(struct anv_cmd_buffer *cmd_buffer) { -#if GFX_VERx10 >= 120 +#if INTEL_WA_16013994831_GFX_VER /* Wa_16013994831 - Disable preemption during streamout, enable back * again if XFB not used by the current pipeline. * diff --git a/src/intel/vulkan/genX_gpu_memcpy.c b/src/intel/vulkan/genX_gpu_memcpy.c index 70b0851850f..92ed6f13ac2 100644 --- a/src/intel/vulkan/genX_gpu_memcpy.c +++ b/src/intel/vulkan/genX_gpu_memcpy.c @@ -80,7 +80,9 @@ emit_common_so_memcpy(struct anv_batch *batch, struct anv_device *device, anv_batch_emit(batch, GENX(3DSTATE_MESH_CONTROL), mesh); anv_batch_emit(batch, GENX(3DSTATE_TASK_CONTROL), task); } +#endif +#if INTEL_WA_16013994831_GFX_VER /* Wa_16013994831 - Disable preemption during streamout. */ if (intel_needs_workaround(device->info, 16013994831)) genX(batch_set_preemption)(batch, device->info, _3D, false); From 0de687d8f817b36324a5c239cd5f23422831aa17 Mon Sep 17 00:00:00 2001 From: Patrick Lerda Date: Fri, 16 Feb 2024 14:22:05 +0100 Subject: [PATCH 47/90] r300: fix vertex_buffer related refcnt imbalance Indeed, vertex_buffer was not properly freed. For instance, this issue is triggered with: "piglit/bin/fcc-read-after-clear blit rb -auto -fbo" while setting GALLIUM_REFCNT_LOG=refcnt.log. Fixes: 8a963d122d4b ("r300g/swtcl: don't do stuff which is only for HWTCL") Signed-off-by: Patrick Lerda Part-of: (cherry picked from commit 3b90c46bdf9b536e6856b1ead5f8d806080728f7) --- .pick_status.json | 2 +- src/gallium/drivers/r300/r300_context.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 37108f61c24..aaf935074f6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2654,7 +2654,7 @@ "description": "r300: fix vertex_buffer related refcnt imbalance", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "8a963d122d4b67209214b0483084ba950814f42b", "notes": null diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index edad0071a5a..f77a6d6e97d 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -86,6 +86,9 @@ static void r300_destroy_context(struct pipe_context* context) if (r300->draw) draw_destroy(r300->draw); + for (unsigned i = 0; i < r300->nr_vertex_buffers; i++) + pipe_vertex_buffer_unreference(&r300->vertex_buffer[i]); + if (r300->uploader) u_upload_destroy(r300->uploader); if (r300->context.stream_uploader) From 6add0415135e3527a957a984ae1199236f7e484a Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Fri, 2 Feb 2024 10:24:18 -0500 Subject: [PATCH 48/90] vk/wsi/x11/sw: use swapchain depth for putimage this is otherwise broken for 32bit depth windows cc: mesa-stable Reviewed-by: Dave Airlie Part-of: (cherry picked from commit 1e849b12f53350e9e5c4a4dab5b89559da4aa97d) --- .pick_status.json | 2 +- src/vulkan/wsi/wsi_common_x11.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index aaf935074f6..3f96ec39ffa 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2354,7 +2354,7 @@ "description": "vk/wsi/x11/sw: use swapchain depth for putimage", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c index b7724c028ea..f6d711297e3 100644 --- a/src/vulkan/wsi/wsi_common_x11.c +++ b/src/vulkan/wsi/wsi_common_x11.c @@ -1666,7 +1666,7 @@ x11_present_to_x11_sw(struct x11_swapchain *chain, uint32_t image_index, chain->gc, image->base.row_pitches[0] / 4, chain->extent.height, - 0,0,0,24, + 0,0,0,chain->depth, image->base.row_pitches[0] * chain->extent.height, image->base.cpu_map); xcb_discard_reply(chain->conn, cookie.sequence); @@ -1681,7 +1681,7 @@ x11_present_to_x11_sw(struct x11_swapchain *chain, uint32_t image_index, chain->gc, image->base.row_pitches[0] / 4, this_lines, - 0,y_start,0,24, + 0,y_start,0,chain->depth, this_lines * stride_b, (const uint8_t *)myptr + (y_start * stride_b)); xcb_discard_reply(chain->conn, cookie.sequence); From 0f8d77fc046b8beac49167fc78fb35345b0dfb5b Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Tue, 20 Feb 2024 19:37:56 -0600 Subject: [PATCH 49/90] nvk: Invalidate the texture cache before MSAA resolves Fixes: 4bd2ba31fc95 ("nvk: Use meta for MSAA resolves") Part-of: (cherry picked from commit 3b658028ddf2f1775a8698aae5082c2a222282e4) --- .pick_status.json | 2 +- src/nouveau/vulkan/nvk_cmd_draw.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 3f96ec39ffa..d9b04f16b60 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2084,7 +2084,7 @@ "description": "nvk: Invalidate the texture cache before MSAA resolves", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "4bd2ba31fc952a5ef2e5e238752b9a3d0f750f9c", "notes": null diff --git a/src/nouveau/vulkan/nvk_cmd_draw.c b/src/nouveau/vulkan/nvk_cmd_draw.c index 56b16b2e898..d67125806a2 100644 --- a/src/nouveau/vulkan/nvk_cmd_draw.c +++ b/src/nouveau/vulkan/nvk_cmd_draw.c @@ -917,7 +917,9 @@ nvk_CmdEndRendering(VkCommandBuffer commandBuffer) if (need_resolve) { struct nv_push *p = nvk_cmd_buffer_push(cmd, 2); - P_IMMD(p, NV9097, WAIT_FOR_IDLE, 0); + P_IMMD(p, NVA097, INVALIDATE_TEXTURE_DATA_CACHE, { + .lines = LINES_ALL, + }); nvk_meta_resolve_rendering(cmd, &vk_render); } From 2bc85abbf2b1f62b625732c9c301e24626fb63c3 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 21 Feb 2024 14:28:14 +1000 Subject: [PATCH 50/90] nouveau/winsys: fix bda heap leak. found with valgrind. Fixes: b4cfac64c8a9 ("nvk: Add a separate VMA heap for BDA capture/replay") Part-of: (cherry picked from commit fd04c14306882693e5ba95fd7a128800c3069f5b) --- .pick_status.json | 2 +- src/nouveau/winsys/nouveau_device.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index d9b04f16b60..2e77c1c96f4 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2054,7 +2054,7 @@ "description": "nouveau/winsys: fix bda heap leak.", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "b4cfac64c8a98026d3698a2231c09a21bbe5a2f4", "notes": null diff --git a/src/nouveau/winsys/nouveau_device.c b/src/nouveau/winsys/nouveau_device.c index 904a7ad6241..5e0f0f9c94c 100644 --- a/src/nouveau/winsys/nouveau_device.c +++ b/src/nouveau/winsys/nouveau_device.c @@ -351,6 +351,7 @@ nouveau_ws_device_new(drmDevicePtr drm_device) out_err: if (device->has_vm_bind) { util_vma_heap_finish(&device->vma_heap); + util_vma_heap_finish(&device->bda_heap); simple_mtx_destroy(&device->vma_mutex); } if (ver) @@ -372,6 +373,7 @@ nouveau_ws_device_destroy(struct nouveau_ws_device *device) if (device->has_vm_bind) { util_vma_heap_finish(&device->vma_heap); + util_vma_heap_finish(&device->bda_heap); simple_mtx_destroy(&device->vma_mutex); } From 2e1ccf1c598b5ed940b04c9b7f39c1f7aa64d309 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Wed, 21 Feb 2024 14:31:56 +1000 Subject: [PATCH 51/90] nvk: fix dri options leak. Noticed in valgrind. Fixes: edb522953878 ("nvk: Hook up driconf for nvk_instance") Part-of: (cherry picked from commit f47858b8375f5abfba031b1a5ea9b5dbf122dbf0) --- .pick_status.json | 2 +- src/nouveau/vulkan/nvk_instance.c | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 2e77c1c96f4..4cea68fe6f6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2044,7 +2044,7 @@ "description": "nvk: fix dri options leak.", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "edb52295387839b032d9c14bbf09994d4a3416d7", "notes": null diff --git a/src/nouveau/vulkan/nvk_instance.c b/src/nouveau/vulkan/nvk_instance.c index 5340b1b6837..2fcea916fe5 100644 --- a/src/nouveau/vulkan/nvk_instance.c +++ b/src/nouveau/vulkan/nvk_instance.c @@ -155,6 +155,9 @@ nvk_DestroyInstance(VkInstance _instance, if (!instance) return; + driDestroyOptionCache(&instance->dri_options); + driDestroyOptionInfo(&instance->available_dri_options); + vk_instance_finish(&instance->vk); vk_free(&instance->vk.alloc, instance); } From d0ea44cfdcd63fa8c5a65062bf2e972e70b0b7b6 Mon Sep 17 00:00:00 2001 From: Iago Toral Quiroga Date: Mon, 19 Feb 2024 11:15:01 +0100 Subject: [PATCH 52/90] v3d,v3dv: fix BO allocation for shared vars MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We need to allocate "shared size" bytes for each workgroup but we were incorrectly multiplying by the number of workgroups in each supergroup instead, which would typically cause us to allocate less memory than actually required. The reason this issue was not visible until now is that the kernel driver is using a large page alignment on all BO allocations and this causes us to "waste" a lot of memory after each allocation. Incidentally, this wasted memory ensured that out of bounds accesses would not cause issues since they would typically land in unused memory regions in between aligned allocations, however, experimenting with reduced memory aligments raised the issue, which manifested with the UE4 Shooter demo as a GPU hang caused by corrupted state from out of bounds memory writes to CS shared memory. Reviewed-by: Alejandro Piñeiro Cc: mesa-stable Part-of: (cherry picked from commit 1880e7cfed18eecc8acc2c48df86d92e72df9177) --- .pick_status.json | 2 +- src/broadcom/vulkan/v3dv_cmd_buffer.c | 2 +- src/gallium/drivers/v3d/v3dx_draw.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 4cea68fe6f6..d59dab2e7bf 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2034,7 +2034,7 @@ "description": "v3d,v3dv: fix BO allocation for shared vars", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/broadcom/vulkan/v3dv_cmd_buffer.c b/src/broadcom/vulkan/v3dv_cmd_buffer.c index da4518de100..dda20edc157 100644 --- a/src/broadcom/vulkan/v3dv_cmd_buffer.c +++ b/src/broadcom/vulkan/v3dv_cmd_buffer.c @@ -4327,7 +4327,7 @@ cmd_buffer_create_csd_job(struct v3dv_cmd_buffer *cmd_buffer, if (cs_variant->prog_data.cs->shared_size > 0) { job->csd.shared_memory = v3dv_bo_alloc(cmd_buffer->device, - cs_variant->prog_data.cs->shared_size * wgs_per_sg, + cs_variant->prog_data.cs->shared_size * num_wgs, "shared_vars", true); if (!job->csd.shared_memory) { v3dv_flag_oom(cmd_buffer, NULL); diff --git a/src/gallium/drivers/v3d/v3dx_draw.c b/src/gallium/drivers/v3d/v3dx_draw.c index feba9080ec2..eec3b0b6df8 100644 --- a/src/gallium/drivers/v3d/v3dx_draw.c +++ b/src/gallium/drivers/v3d/v3dx_draw.c @@ -1390,7 +1390,7 @@ v3d_launch_grid(struct pipe_context *pctx, const struct pipe_grid_info *info) v3d->compute_shared_memory = v3d_bo_alloc(v3d->screen, v3d->prog.compute->prog_data.compute->shared_size * - wgs_per_sg, + num_wgs, "shared_vars"); } From d3df85a1979b999e2f9b411e4f32aedc2bdbbe78 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 30 Jan 2024 14:48:12 +0100 Subject: [PATCH 53/90] spirv: only consider IO variables when adjusting patch locations for TES With TES, the primitive ID is an input variable but it's considered a sysval by SPIRV->NIR. Though, its value is greater than VARYING_SLOT_VAR0 which means its location was adjusted by mistake. This fixes compiling a tessellation evaluation shader in debug build with Enshrouded. Fixes: dfbc03fa884 ("spirv: Fix locations for per-patch varyings") Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 78ea304a06cda5ddfed9cabb7c13ea2a82392ece) --- .pick_status.json | 2 +- src/compiler/spirv/vtn_variables.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index d59dab2e7bf..300b2aced5b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2014,7 +2014,7 @@ "description": "spirv: only consider IO variables when adjusting patch locations for TES", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "dfbc03fa88478126607c69723a61280f6e9a011f", "notes": null diff --git a/src/compiler/spirv/vtn_variables.c b/src/compiler/spirv/vtn_variables.c index ce4b19134ab..49c07b950c9 100644 --- a/src/compiler/spirv/vtn_variables.c +++ b/src/compiler/spirv/vtn_variables.c @@ -2024,7 +2024,9 @@ adjust_patch_locations(struct vtn_builder *b, struct vtn_variable *var) for (uint16_t i = 0; i < num_data; i++) { vtn_assert(data[i].location < VARYING_SLOT_PATCH0); - if (data[i].patch && data[i].location >= VARYING_SLOT_VAR0) + if (data[i].patch && + (data[i].mode == nir_var_shader_in || data[i].mode == nir_var_shader_out) && + data[i].location >= VARYING_SLOT_VAR0) data[i].location += VARYING_SLOT_PATCH0 - VARYING_SLOT_VAR0; } } From db5a9976260e54d46674e7611f8d4bc18061a605 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Tue, 20 Feb 2024 15:07:13 +0200 Subject: [PATCH 54/90] anv: disable Wa_16013994831 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We've implemented another workaround completely disabling high priority preemption. Signed-off-by: Lionel Landwerlin Fixes: e6e320fc79 ("anv: make Wa_16013994831 to use intel_needs_workaround") Reviewed-by: Tapani Pälli Part-of: (cherry picked from commit 137b7e874f22a9b4ce37b4cbe2a11576f7648109) --- .pick_status.json | 2 +- src/intel/vulkan/anv_device.c | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 300b2aced5b..c9f624d2eb4 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2004,7 +2004,7 @@ "description": "anv: disable Wa_16013994831", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e6e320fc7996db60231d277bc3e28fdd01018b33", "notes": null diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c index 56473427dbe..02010295343 100644 --- a/src/intel/vulkan/anv_device.c +++ b/src/intel/vulkan/anv_device.c @@ -2165,6 +2165,14 @@ anv_physical_device_try_create(struct vk_instance *vk_instance, goto fail_fd; } + /* Disable Wa_16013994831 on Gfx12.0 because we found other cases where we + * need to always disable preemption : + * - https://gitlab.freedesktop.org/mesa/mesa/-/issues/5963 + * - https://gitlab.freedesktop.org/mesa/mesa/-/issues/5662 + */ + if (devinfo.verx10 == 120) + BITSET_CLEAR(devinfo.workarounds, INTEL_WA_16013994831); + if (!devinfo.has_context_isolation) { result = vk_errorf(instance, VK_ERROR_INCOMPATIBLE_DRIVER, "Vulkan requires context isolation for %s", devinfo.name); From c7f3e736a03c79d55d34a0fe731870060ca1e24f Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Mon, 12 Feb 2024 16:38:28 +0000 Subject: [PATCH 55/90] aco/ra: don't initialize assigned in initializer list MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit According to Valgrind, vcc/m0 are uninitialized and this fixes it. Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Cc: mesa-stable Part-of: (cherry picked from commit 53800191a3a7f38e2211768d7f75ebbf5508bf69) --- .pick_status.json | 2 +- src/amd/compiler/aco_register_allocation.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index c9f624d2eb4..37a43841fc1 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1984,7 +1984,7 @@ "description": "aco/ra: don't initialize assigned in initializer list", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 83960cd5d77..9945362eaa4 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -62,7 +62,7 @@ struct assignment { }; uint32_t affinity = 0; assignment() = default; - assignment(PhysReg reg_, RegClass rc_) : reg(reg_), rc(rc_), assigned(-1) {} + assignment(PhysReg reg_, RegClass rc_) : reg(reg_), rc(rc_) { assigned = true; } void set(const Definition& def) { assigned = true; From d50d8ea2bae84ac3da0e435614d73cc062b6630e Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Mon, 12 Feb 2024 16:54:20 +0000 Subject: [PATCH 56/90] aco/ra: fix GFX9- writelane MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 061b8bfd2980 moved handling of fixed operands earlier, but it should have moved the fixing of writelane operands earlier too. This fixes Crucible's func.uniform-subgroup.exclusive.imin64 on GFX8. Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Fixes: 061b8bfd2980 ("aco/ra: rework fixed operands") Part-of: (cherry picked from commit d0595e48055b19c3dbdc340860dd900c0ea0e0a4) --- .pick_status.json | 2 +- src/amd/compiler/aco_register_allocation.cpp | 25 ++++++++++---------- src/amd/compiler/tests/test_regalloc.cpp | 18 ++++++++++++++ 3 files changed, 31 insertions(+), 14 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 37a43841fc1..8e750cf3815 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1974,7 +1974,7 @@ "description": "aco/ra: fix GFX9- writelane", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "061b8bfd2980a5ed903febef42be288ab1eb4e40", "notes": null diff --git a/src/amd/compiler/aco_register_allocation.cpp b/src/amd/compiler/aco_register_allocation.cpp index 9945362eaa4..989e566fa26 100644 --- a/src/amd/compiler/aco_register_allocation.cpp +++ b/src/amd/compiler/aco_register_allocation.cpp @@ -1936,19 +1936,6 @@ bool operand_can_use_reg(amd_gfx_level gfx_level, aco_ptr& instr, unsigned idx, PhysReg reg, RegClass rc) { - bool is_writelane = instr->opcode == aco_opcode::v_writelane_b32 || - instr->opcode == aco_opcode::v_writelane_b32_e64; - if (gfx_level <= GFX9 && is_writelane && idx <= 1) { - /* v_writelane_b32 can take two sgprs but only if one is m0. */ - bool is_other_sgpr = - instr->operands[!idx].isTemp() && - (!instr->operands[!idx].isFixed() || instr->operands[!idx].physReg() != m0); - if (is_other_sgpr && instr->operands[!idx].tempId() != instr->operands[idx].tempId()) { - instr->operands[idx].setFixed(m0); - return reg == m0; - } - } - if (reg.byte()) { unsigned stride = get_subdword_operand_stride(gfx_level, instr, idx, rc); if (reg.byte() % stride) @@ -2844,6 +2831,18 @@ register_allocation(Program* program, std::vector& live_out_per_block, ra operand.isFixed() && ctx.assignments[operand.tempId()].reg != operand.physReg(); } + bool is_writelane = instr->opcode == aco_opcode::v_writelane_b32 || + instr->opcode == aco_opcode::v_writelane_b32_e64; + if (program->gfx_level <= GFX9 && is_writelane && instr->operands[0].isTemp() && + instr->operands[1].isTemp()) { + /* v_writelane_b32 can take two sgprs but only if one is m0. */ + if (ctx.assignments[instr->operands[0].tempId()].reg != m0 && + ctx.assignments[instr->operands[1].tempId()].reg != m0) { + instr->operands[0].setFixed(m0); + fixed = true; + } + } + if (fixed) handle_fixed_operands(ctx, register_file, parallelcopy, instr); diff --git a/src/amd/compiler/tests/test_regalloc.cpp b/src/amd/compiler/tests/test_regalloc.cpp index 456c42359d4..2a8ac922fc6 100644 --- a/src/amd/compiler/tests/test_regalloc.cpp +++ b/src/amd/compiler/tests/test_regalloc.cpp @@ -410,3 +410,21 @@ BEGIN_TEST(regalloc.vinterp_fp16) finish_ra_test(ra_test_policy()); END_TEST + +BEGIN_TEST(regalloc.writelane) + //>> v1: %in0:v[0], s1: %in1:s[0], s1: %in2:s[1], s1: %in3:s[2] = p_startpgm + if (!setup_cs("v1 s1 s1 s1", GFX8)) + return; + + //! s1: %tmp:m0 = p_parallelcopy %int3:s[2] + Temp tmp = bld.copy(bld.def(s1, m0), inputs[3]); + + //! s1: %in1_2:m0, s1: %tmp_2:s[0] = p_parallelcopy %in1:s[0], %tmp:m0 + //! v1: %tmp2:v[0] = v_writelane_b32_e64 %in1_2:m0, %in2:s[1], %in0:v[0] + Temp tmp2 = bld.writelane(bld.def(v1), inputs[1], inputs[2], inputs[0]); + + //! p_unit_test %tmp_2:s[0], %tmp2:v[0] + bld.pseudo(aco_opcode::p_unit_test, tmp, tmp2); + + finish_ra_test(ra_test_policy()); +END_TEST From c8bdf6129a4a628e788fc964e4621ed807663835 Mon Sep 17 00:00:00 2001 From: Chris Rankin Date: Mon, 19 Feb 2024 14:08:38 +0000 Subject: [PATCH 57/90] vdpau: Declare texture object as immutable using helper function. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10618 Signed-off-by: Chris Rankin Reviewed-by: Marek Olšák Part-of: (cherry picked from commit e1e84b0721312b5b5b085571d6a5e0504f01d4fb) --- .pick_status.json | 2 +- src/mesa/main/vdpau.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 8e750cf3815..22f3b56b3d2 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1964,7 +1964,7 @@ "description": "vdpau: Declare texture object as immutable using helper function.", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/mesa/main/vdpau.c b/src/mesa/main/vdpau.c index b648dfbdac2..a9d1e97fd31 100644 --- a/src/mesa/main/vdpau.c +++ b/src/mesa/main/vdpau.c @@ -39,6 +39,7 @@ #include "glformats.h" #include "texobj.h" #include "teximage.h" +#include "textureview.h" #include "api_exec_decl.h" #include "state_tracker/st_cb_texture.h" @@ -179,7 +180,7 @@ register_surface(struct gl_context *ctx, GLboolean isOutput, } /* This will disallow respecifying the storage. */ - tex->Immutable = GL_TRUE; + _mesa_set_texture_view_state(ctx, tex, target, 1); _mesa_unlock_texture(ctx, tex); _mesa_reference_texobj(&surf->textures[i], tex); From 21090c8d3ecf2982291622c934a16be686fefa38 Mon Sep 17 00:00:00 2001 From: Karol Herbst Date: Sat, 17 Feb 2024 01:45:07 +0100 Subject: [PATCH 58/90] meson: do not pull in clc for clover Fixes: 01d0d943197 ("meson: Simplify clc expression") Signed-off-by: Karol Herbst Acked-by: Lionel Landwerlin Part-of: (cherry picked from commit 815a6647eb1383e9dc704ffcc266d85f3b13338a) --- .pick_status.json | 2 +- meson.build | 3 +-- src/compiler/meson.build | 2 +- 3 files changed, 3 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 22f3b56b3d2..2055ad0c764 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1714,7 +1714,7 @@ "description": "meson: do not pull in clc for clover", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "01d0d9431977ac25a191c860cb6711f48e6c173f", "notes": null diff --git a/meson.build b/meson.build index 1c8667a8fce..133fd9a8ca3 100644 --- a/meson.build +++ b/meson.build @@ -813,7 +813,6 @@ if _opencl != 'disabled' error('The Clover OpenCL state tracker requires rtti') endif - with_clc = true with_gallium_opencl = true with_opencl_icd = _opencl == 'icd' else @@ -838,7 +837,7 @@ if with_gallium_rusticl endif dep_clc = null_dep -if with_clc +if with_gallium_opencl or with_clc dep_clc = dependency('libclc') endif diff --git a/src/compiler/meson.build b/src/compiler/meson.build index 1dae56d1b2b..8d73544c6d8 100644 --- a/src/compiler/meson.build +++ b/src/compiler/meson.build @@ -79,7 +79,7 @@ subdir('nir') subdir('spirv') -if with_opencl_spirv +if with_clc subdir('clc') endif if with_gallium From 76bb6e7f8ec7a867599a9c549dc6e309dc57d6cb Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 16 Feb 2024 14:05:05 +0100 Subject: [PATCH 59/90] radv: fix indirect dispatches on compute queue with conditional rendering on GFX7 COND_EXEC needs to happen right before PKT3_DISPATCH_INDIRECT. Like this combination will probably never happen but better to have it fixed anyways. Fixes: 5c03cdbd02a ("radv: fix indirect dispatches on the compute queue on GFX7") Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 9ae8f0f9d7444cd54d817bb2bfff59b8fd6e543f) --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 10 +++++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 2055ad0c764..6cc8e1ba61f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1564,7 +1564,7 @@ "description": "radv: fix indirect dispatches on compute queue with conditional rendering on GFX7", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "5c03cdbd02a69884ce759e0cbd0cf76dc212e2d3", "notes": null diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 173ab81c832..744eb13f6d5 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -9665,12 +9665,16 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer, const struct radv if (radv_cmd_buffer_uses_mec(cmd_buffer)) { uint64_t indirect_va = info->va; + const bool needs_align32_workaround = + cmd_buffer->device->physical_device->rad_info.has_async_compute_align32_bug && + cmd_buffer->qf == RADV_QUEUE_COMPUTE && !radv_is_aligned(indirect_va, 32); + const unsigned ace_predication_size = + 4 /* DISPATCH_INDIRECT */ + (needs_align32_workaround ? 6 * 3 /* 3x COPY_DATA */ : 0); radv_cs_emit_compute_predication(&cmd_buffer->state, cs, cmd_buffer->mec_inv_pred_va, - &cmd_buffer->mec_inv_pred_emitted, 4 /* DISPATCH_INDIRECT size */); + &cmd_buffer->mec_inv_pred_emitted, ace_predication_size); - if (cmd_buffer->device->physical_device->rad_info.has_async_compute_align32_bug && - cmd_buffer->qf == RADV_QUEUE_COMPUTE && !radv_is_aligned(indirect_va, 32)) { + if (needs_align32_workaround) { const uint64_t unaligned_va = indirect_va; UNUSED void *ptr; uint32_t offset; From da3ac67e23eccbe64265057791454b5e6696f71e Mon Sep 17 00:00:00 2001 From: Erik Faye-Lund Date: Wed, 21 Feb 2024 12:10:36 +0100 Subject: [PATCH 60/90] mesa/main: allow GL_BGRA for FBOs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The EXT_texture_format_BGRA8888 spec clearly defines GL_BGRA as a color-renderable format, so we need to support it here as well. This has been broken since the day support for the extension was added. Oh well, let's fix it up! Fixes: 1d595c7cd4a ("gles2: Add GL_EXT_texture_format_BGRA8888 support") Reviewed-by: Marek Olšák Part-of: (cherry picked from commit 3b23e9d89dd285f3bc33a44dc669aebf2fbc1f56) --- .pick_status.json | 2 +- src/mesa/main/fbobject.c | 10 ++++++++++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 6cc8e1ba61f..74ad374d64a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1504,7 +1504,7 @@ "description": "mesa/main: allow GL_BGRA for FBOs", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "1d595c7cd4aefc7baf1942626f53bec8f6699f7f", "notes": null diff --git a/src/mesa/main/fbobject.c b/src/mesa/main/fbobject.c index 9f409ac2029..47e7f5f4ebd 100644 --- a/src/mesa/main/fbobject.c +++ b/src/mesa/main/fbobject.c @@ -2659,6 +2659,16 @@ _mesa_base_fbo_format(const struct gl_context *ctx, GLenum internalFormat) case GL_RGB565: return _mesa_is_gles(ctx) || ctx->Extensions.ARB_ES2_compatibility ? GL_RGB : 0; + + case GL_BGRA: + /* EXT_texture_format_BGRA8888 only adds this as color-renderable for + * GLES 2 and later + */ + if (_mesa_has_EXT_texture_format_BGRA8888(ctx) && _mesa_is_gles2(ctx)) + return GL_RGBA; + else + return 0; + default: return 0; } From 5e178a07a0708e9007c99dc8577f3b7844377296 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Tue, 13 Feb 2024 11:25:54 +0100 Subject: [PATCH 61/90] llvmpipe: Use full subgroups when possible Fixes computeFullSubgroups on lavapipe. cc: mesa-stable Reviewed-by: Mike Blumenkrantz Part-of: (cherry picked from commit eb3c96d5ed4fe8e57d8d225fa6e740282b510a8f) --- .pick_status.json | 2 +- src/gallium/drivers/llvmpipe/lp_state_cs.c | 141 ++++++++------------- 2 files changed, 51 insertions(+), 92 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 74ad374d64a..a3b55fb2315 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1344,7 +1344,7 @@ "description": "llvmpipe: Use full subgroups when possible", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/llvmpipe/lp_state_cs.c b/src/gallium/drivers/llvmpipe/lp_state_cs.c index c4661ced025..46cc5ffb06f 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_cs.c +++ b/src/gallium/drivers/llvmpipe/lp_state_cs.c @@ -95,7 +95,7 @@ enum { CS_ARG_VERTEX_DATA, CS_ARG_PER_THREAD_DATA, CS_ARG_OUTER_COUNT, - CS_ARG_CORO_X_LOOPS = CS_ARG_OUTER_COUNT, + CS_ARG_CORO_SUBGROUP_COUNT = CS_ARG_OUTER_COUNT, CS_ARG_CORO_PARTIALS, CS_ARG_CORO_BLOCK_X_SIZE, CS_ARG_CORO_BLOCK_Y_SIZE, @@ -374,7 +374,7 @@ generate_compute(struct llvmpipe_context *lp, else arg_types[CS_ARG_VERTEX_DATA] = LLVMPointerType(LLVMInt8TypeInContext(gallivm->context), 0); /* mesh shaders only */ arg_types[CS_ARG_PER_THREAD_DATA] = variant->jit_cs_thread_data_ptr_type; /* per thread data */ - arg_types[CS_ARG_CORO_X_LOOPS] = int32_type; /* coro only - num X loops */ + arg_types[CS_ARG_CORO_SUBGROUP_COUNT] = int32_type; /* coro only - subgroup count */ arg_types[CS_ARG_CORO_PARTIALS] = int32_type; /* coro only - partials */ arg_types[CS_ARG_CORO_BLOCK_X_SIZE] = int32_type; /* coro block_x_size */ arg_types[CS_ARG_CORO_BLOCK_Y_SIZE] = int32_type; /* coro block_y_size */ @@ -560,23 +560,24 @@ generate_compute(struct llvmpipe_context *lp, output_array = lp_build_array_alloca(gallivm, output_type, lp_build_const_int32(gallivm, align(MAX2(nir->info.mesh.max_primitives_out, nir->info.mesh.max_vertices_out), 8)), "outputs"); } - struct lp_build_loop_state loop_state[4]; - LLVMValueRef num_x_loop; - LLVMValueRef vec_length = lp_build_const_int32(gallivm, cs_type.length); - num_x_loop = LLVMBuildAdd(gallivm->builder, block_x_size_arg, vec_length, ""); - num_x_loop = LLVMBuildSub(gallivm->builder, num_x_loop, lp_build_const_int32(gallivm, 1), ""); - num_x_loop = LLVMBuildUDiv(gallivm->builder, num_x_loop, vec_length, ""); - LLVMValueRef partials = LLVMBuildURem(gallivm->builder, block_x_size_arg, vec_length, ""); + struct lp_build_loop_state loop_state[2]; - LLVMValueRef coro_num_hdls = LLVMBuildMul(gallivm->builder, num_x_loop, block_y_size_arg, ""); - coro_num_hdls = LLVMBuildMul(gallivm->builder, coro_num_hdls, block_z_size_arg, ""); + LLVMValueRef vec_length = lp_build_const_int32(gallivm, cs_type.length); + + LLVMValueRef invocation_count = LLVMBuildMul(gallivm->builder, block_x_size_arg, block_y_size_arg, ""); + invocation_count = LLVMBuildMul(gallivm->builder, invocation_count, block_z_size_arg, ""); + + LLVMValueRef partials = LLVMBuildURem(gallivm->builder, invocation_count, vec_length, ""); + + LLVMValueRef num_subgroup_loop = LLVMBuildAdd(gallivm->builder, invocation_count, lp_build_const_int32(gallivm, cs_type.length - 1), ""); + num_subgroup_loop = LLVMBuildUDiv(gallivm->builder, num_subgroup_loop, vec_length, ""); /* build a ptr in memory to store all the frames in later. */ LLVMTypeRef hdl_ptr_type = LLVMPointerType(LLVMInt8TypeInContext(gallivm->context), 0); LLVMValueRef coro_mem = LLVMBuildAlloca(gallivm->builder, hdl_ptr_type, "coro_mem"); LLVMBuildStore(builder, LLVMConstNull(hdl_ptr_type), coro_mem); - LLVMValueRef coro_hdls = LLVMBuildArrayAlloca(gallivm->builder, hdl_ptr_type, coro_num_hdls, "coro_hdls"); + LLVMValueRef coro_hdls = LLVMBuildArrayAlloca(gallivm->builder, hdl_ptr_type, num_subgroup_loop, "coro_hdls"); unsigned end_coroutine = INT_MAX; @@ -585,22 +586,17 @@ generate_compute(struct llvmpipe_context *lp, * and calls the coroutine main entrypoint on the first pass, but in subsequent * passes it checks if the coroutine has completed and resumes it if not. */ - /* take x_width - round up to type.length width */ - lp_build_loop_begin(&loop_state[3], gallivm, - lp_build_const_int32(gallivm, 0)); /* coroutine reentry loop */ - lp_build_loop_begin(&loop_state[2], gallivm, - lp_build_const_int32(gallivm, 0)); /* z loop */ lp_build_loop_begin(&loop_state[1], gallivm, - lp_build_const_int32(gallivm, 0)); /* y loop */ + lp_build_const_int32(gallivm, 0)); /* coroutine reentry loop */ lp_build_loop_begin(&loop_state[0], gallivm, - lp_build_const_int32(gallivm, 0)); /* x loop */ + lp_build_const_int32(gallivm, 0)); /* subgroup loop */ { LLVMValueRef args[CS_ARG_MAX]; args[CS_ARG_CONTEXT] = context_ptr; args[CS_ARG_RESOURCES] = resources_ptr; - args[CS_ARG_BLOCK_X_SIZE] = loop_state[0].counter; - args[CS_ARG_BLOCK_Y_SIZE] = loop_state[1].counter; - args[CS_ARG_BLOCK_Z_SIZE] = loop_state[2].counter; + args[CS_ARG_BLOCK_X_SIZE] = LLVMGetUndef(int32_type); + args[CS_ARG_BLOCK_Y_SIZE] = LLVMGetUndef(int32_type); + args[CS_ARG_BLOCK_Z_SIZE] = LLVMGetUndef(int32_type); args[CS_ARG_GRID_X] = grid_x_arg; args[CS_ARG_GRID_Y] = grid_y_arg; args[CS_ARG_GRID_Z] = grid_z_arg; @@ -611,34 +607,25 @@ generate_compute(struct llvmpipe_context *lp, args[CS_ARG_DRAW_ID] = draw_id_arg; args[CS_ARG_VERTEX_DATA] = io_ptr; args[CS_ARG_PER_THREAD_DATA] = thread_data_ptr; - args[CS_ARG_CORO_X_LOOPS] = num_x_loop; + args[CS_ARG_CORO_SUBGROUP_COUNT] = num_subgroup_loop; args[CS_ARG_CORO_PARTIALS] = partials; args[CS_ARG_CORO_BLOCK_X_SIZE] = block_x_size_arg; args[CS_ARG_CORO_BLOCK_Y_SIZE] = block_y_size_arg; args[CS_ARG_CORO_BLOCK_Z_SIZE] = block_z_size_arg; - /* idx = (z * (size_x * size_y) + y * size_x + x */ - LLVMValueRef coro_hdl_idx = LLVMBuildMul(gallivm->builder, loop_state[2].counter, - LLVMBuildMul(gallivm->builder, num_x_loop, block_y_size_arg, ""), ""); - coro_hdl_idx = LLVMBuildAdd(gallivm->builder, coro_hdl_idx, - LLVMBuildMul(gallivm->builder, loop_state[1].counter, - num_x_loop, ""), ""); - coro_hdl_idx = LLVMBuildAdd(gallivm->builder, coro_hdl_idx, - loop_state[0].counter, ""); - - args[CS_ARG_CORO_IDX] = coro_hdl_idx; + args[CS_ARG_CORO_IDX] = loop_state[0].counter; args[CS_ARG_CORO_MEM] = coro_mem; if (is_mesh) args[CS_ARG_CORO_OUTPUTS] = output_array; - LLVMValueRef coro_entry = LLVMBuildGEP2(gallivm->builder, hdl_ptr_type, coro_hdls, &coro_hdl_idx, 1, ""); + LLVMValueRef coro_entry = LLVMBuildGEP2(gallivm->builder, hdl_ptr_type, coro_hdls, &loop_state[0].counter, 1, ""); LLVMValueRef coro_hdl = LLVMBuildLoad2(gallivm->builder, hdl_ptr_type, coro_entry, "coro_hdl"); struct lp_build_if_state ifstate; - LLVMValueRef cmp = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, loop_state[3].counter, + LLVMValueRef cmp = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, loop_state[1].counter, lp_build_const_int32(gallivm, 0), ""); /* first time here - call the coroutine function entry point */ lp_build_if(&ifstate, gallivm, cmp); @@ -651,24 +638,18 @@ generate_compute(struct llvmpipe_context *lp, lp_build_if(&ifstate2, gallivm, coro_done); /* if done destroy and force loop exit */ lp_build_coro_destroy(gallivm, coro_hdl); - lp_build_loop_force_set_counter(&loop_state[3], lp_build_const_int32(gallivm, end_coroutine - 1)); + lp_build_loop_force_set_counter(&loop_state[1], lp_build_const_int32(gallivm, end_coroutine - 1)); lp_build_else(&ifstate2); /* otherwise resume the coroutine */ lp_build_coro_resume(gallivm, coro_hdl); lp_build_endif(&ifstate2); lp_build_endif(&ifstate); - lp_build_loop_force_reload_counter(&loop_state[3]); + lp_build_loop_force_reload_counter(&loop_state[1]); } lp_build_loop_end_cond(&loop_state[0], - num_x_loop, + num_subgroup_loop, NULL, LLVMIntUGE); lp_build_loop_end_cond(&loop_state[1], - block_y_size_arg, - NULL, LLVMIntUGE); - lp_build_loop_end_cond(&loop_state[2], - block_z_size_arg, - NULL, LLVMIntUGE); - lp_build_loop_end_cond(&loop_state[3], lp_build_const_int32(gallivm, end_coroutine), NULL, LLVMIntEQ); @@ -680,12 +661,8 @@ generate_compute(struct llvmpipe_context *lp, LLVMBuildRetVoid(builder); /* This is stage (b) - generate the compute shader code inside the coroutine. */ - LLVMValueRef x_size_arg, y_size_arg, z_size_arg; context_ptr = LLVMGetParam(coro, CS_ARG_CONTEXT); resources_ptr = LLVMGetParam(coro, CS_ARG_RESOURCES); - x_size_arg = LLVMGetParam(coro, CS_ARG_BLOCK_X_SIZE); - y_size_arg = LLVMGetParam(coro, CS_ARG_BLOCK_Y_SIZE); - z_size_arg = LLVMGetParam(coro, CS_ARG_BLOCK_Z_SIZE); grid_x_arg = LLVMGetParam(coro, CS_ARG_GRID_X); grid_y_arg = LLVMGetParam(coro, CS_ARG_GRID_Y); grid_z_arg = LLVMGetParam(coro, CS_ARG_GRID_Z); @@ -696,12 +673,12 @@ generate_compute(struct llvmpipe_context *lp, draw_id_arg = LLVMGetParam(coro, CS_ARG_DRAW_ID); io_ptr = LLVMGetParam(coro, CS_ARG_VERTEX_DATA); thread_data_ptr = LLVMGetParam(coro, CS_ARG_PER_THREAD_DATA); - num_x_loop = LLVMGetParam(coro, CS_ARG_CORO_X_LOOPS); + num_subgroup_loop = LLVMGetParam(coro, CS_ARG_CORO_SUBGROUP_COUNT); partials = LLVMGetParam(coro, CS_ARG_CORO_PARTIALS); block_x_size_arg = LLVMGetParam(coro, CS_ARG_CORO_BLOCK_X_SIZE); block_y_size_arg = LLVMGetParam(coro, CS_ARG_CORO_BLOCK_Y_SIZE); block_z_size_arg = LLVMGetParam(coro, CS_ARG_CORO_BLOCK_Z_SIZE); - LLVMValueRef coro_idx = LLVMGetParam(coro, CS_ARG_CORO_IDX); + LLVMValueRef subgroup_id = LLVMGetParam(coro, CS_ARG_CORO_IDX); coro_mem = LLVMGetParam(coro, CS_ARG_CORO_MEM); if (is_mesh) output_array = LLVMGetParam(coro, CS_ARG_CORO_OUTPUTS); @@ -730,27 +707,32 @@ generate_compute(struct llvmpipe_context *lp, variant->jit_cs_thread_data_type, thread_data_ptr); - LLVMValueRef coro_num_hdls = LLVMBuildMul(gallivm->builder, num_x_loop, block_y_size_arg, ""); - coro_num_hdls = LLVMBuildMul(gallivm->builder, coro_num_hdls, block_z_size_arg, ""); - /* these are coroutine entrypoint necessities */ LLVMValueRef coro_id = lp_build_coro_id(gallivm); - LLVMValueRef coro_entry = lp_build_coro_alloc_mem_array(gallivm, coro_mem, coro_idx, coro_num_hdls); + LLVMValueRef coro_entry = lp_build_coro_alloc_mem_array(gallivm, coro_mem, subgroup_id, num_subgroup_loop); LLVMTypeRef mem_ptr_type = LLVMInt8TypeInContext(gallivm->context); LLVMValueRef alloced_ptr = LLVMBuildLoad2(gallivm->builder, hdl_ptr_type, coro_mem, ""); alloced_ptr = LLVMBuildGEP2(gallivm->builder, mem_ptr_type, alloced_ptr, &coro_entry, 1, ""); LLVMValueRef coro_hdl = lp_build_coro_begin(gallivm, coro_id, alloced_ptr); LLVMValueRef has_partials = LLVMBuildICmp(gallivm->builder, LLVMIntNE, partials, lp_build_const_int32(gallivm, 0), ""); - LLVMValueRef tids_x[LP_MAX_VECTOR_LENGTH], tids_y[LP_MAX_VECTOR_LENGTH], tids_z[LP_MAX_VECTOR_LENGTH]; - LLVMValueRef base_val = LLVMBuildMul(gallivm->builder, x_size_arg, vec_length, ""); - for (i = 0; i < cs_type.length; i++) { - tids_x[i] = LLVMBuildAdd(gallivm->builder, base_val, lp_build_const_int32(gallivm, i), ""); - tids_y[i] = y_size_arg; - tids_z[i] = z_size_arg; - } - system_values.thread_id[0] = lp_build_gather_values(gallivm, tids_x, cs_type.length); - system_values.thread_id[1] = lp_build_gather_values(gallivm, tids_y, cs_type.length); - system_values.thread_id[2] = lp_build_gather_values(gallivm, tids_z, cs_type.length); + + struct lp_build_context bld; + lp_build_context_init(&bld, gallivm, lp_uint_type(cs_type)); + + LLVMValueRef base_val = LLVMBuildMul(gallivm->builder, subgroup_id, vec_length, ""); + LLVMValueRef invocation_indices[LP_MAX_VECTOR_LENGTH]; + for (i = 0; i < cs_type.length; i++) + invocation_indices[i] = LLVMBuildAdd(gallivm->builder, base_val, lp_build_const_int32(gallivm, i), ""); + LLVMValueRef invocation_index = lp_build_gather_values(gallivm, invocation_indices, cs_type.length); + + LLVMValueRef block_x_size_vec = lp_build_broadcast_scalar(&bld, block_x_size_arg); + LLVMValueRef block_y_size_vec = lp_build_broadcast_scalar(&bld, block_y_size_arg); + + system_values.thread_id[0] = LLVMBuildURem(gallivm->builder, invocation_index, block_x_size_vec, ""); + system_values.thread_id[1] = LLVMBuildUDiv(gallivm->builder, invocation_index, block_x_size_vec, ""); + system_values.thread_id[1] = LLVMBuildURem(gallivm->builder, system_values.thread_id[1], block_y_size_vec, ""); + system_values.thread_id[2] = LLVMBuildUDiv(gallivm->builder, invocation_index, block_x_size_vec, ""); + system_values.thread_id[2] = LLVMBuildUDiv(gallivm->builder, system_values.thread_id[2], block_y_size_vec, ""); system_values.block_id[0] = grid_x_arg; system_values.block_id[1] = grid_y_arg; @@ -763,38 +745,15 @@ generate_compute(struct llvmpipe_context *lp, system_values.work_dim = work_dim_arg; system_values.draw_id = draw_id_arg; - /* subgroup_id = ((z * block_size_x * block_size_y) + (y * block_size_x) + x) / subgroup_size - * - * this breaks if z or y is zero, so distribute the division to preserve ids - * - * subgroup_id = ((z * block_size_x * block_size_y) / subgroup_size) + ((y * block_size_x) / subgroup_size) + (x / subgroup_size) - * - * except "x" is pre-divided here - * - * subgroup_id = ((z * block_size_x * block_size_y) / subgroup_size) + ((y * block_size_x) / subgroup_size) + x - */ - LLVMValueRef subgroup_id = LLVMBuildUDiv(builder, - LLVMBuildMul(gallivm->builder, z_size_arg, LLVMBuildMul(gallivm->builder, block_x_size_arg, block_y_size_arg, ""), ""), - vec_length, ""); - subgroup_id = LLVMBuildAdd(gallivm->builder, - subgroup_id, - LLVMBuildUDiv(builder, LLVMBuildMul(gallivm->builder, y_size_arg, block_x_size_arg, ""), vec_length, ""), - ""); - subgroup_id = LLVMBuildAdd(gallivm->builder, subgroup_id, x_size_arg, ""); system_values.subgroup_id = subgroup_id; - LLVMValueRef num_subgroups = LLVMBuildUDiv(builder, - LLVMBuildMul(builder, block_x_size_arg, - LLVMBuildMul(builder, block_y_size_arg, block_z_size_arg, ""), ""), - vec_length, ""); - LLVMValueRef subgroup_cmp = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, num_subgroups, lp_build_const_int32(gallivm, 0), ""); - system_values.num_subgroups = LLVMBuildSelect(builder, subgroup_cmp, lp_build_const_int32(gallivm, 1), num_subgroups, ""); + system_values.num_subgroups = num_subgroup_loop; system_values.block_size[0] = block_x_size_arg; system_values.block_size[1] = block_y_size_arg; system_values.block_size[2] = block_z_size_arg; - LLVMValueRef last_x_loop = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, x_size_arg, LLVMBuildSub(gallivm->builder, num_x_loop, lp_build_const_int32(gallivm, 1), ""), ""); - LLVMValueRef use_partial_mask = LLVMBuildAnd(gallivm->builder, last_x_loop, has_partials, ""); + LLVMValueRef last_loop = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, subgroup_id, LLVMBuildSub(gallivm->builder, num_subgroup_loop, lp_build_const_int32(gallivm, 1), ""), ""); + LLVMValueRef use_partial_mask = LLVMBuildAnd(gallivm->builder, last_loop, has_partials, ""); struct lp_build_if_state if_state; LLVMTypeRef mask_type = LLVMVectorType(int32_type, cs_type.length); LLVMValueRef mask_val = lp_build_alloca(gallivm, mask_type, "mask"); @@ -866,7 +825,7 @@ generate_compute(struct llvmpipe_context *lp, lp_int_type(cs_type), 0); struct lp_build_if_state iter0state; - LLVMValueRef is_iter0 = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, coro_idx, + LLVMValueRef is_iter0 = LLVMBuildICmp(gallivm->builder, LLVMIntEQ, subgroup_id, lp_build_const_int32(gallivm, 0), ""); LLVMValueRef vertex_count = LLVMBuildLoad2(gallivm->builder, i32t, mesh_iface.vertex_count, ""); LLVMValueRef prim_count = LLVMBuildLoad2(gallivm->builder, i32t, mesh_iface.prim_count, ""); From 6aa24ea086cdd89f7d959b625e5d527bf0ca8b90 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Tue, 13 Feb 2024 20:37:42 +0100 Subject: [PATCH 62/90] gallivm: Consider the initial mask when terminating loops Partial subgroups can lead to infinite loops otherwise. cc: mesa-stable Reviewed-by: Mike Blumenkrantz Part-of: (cherry picked from commit 4d7beb22fae3fe10aed86066ee9d2d9536625a72) --- .pick_status.json | 2 +- .../auxiliary/gallivm/lp_bld_ir_common.c | 42 +++++++++++-------- .../auxiliary/gallivm/lp_bld_ir_common.h | 5 ++- .../auxiliary/gallivm/lp_bld_nir_soa.c | 2 +- .../auxiliary/gallivm/lp_bld_tgsi_soa.c | 2 +- 5 files changed, 31 insertions(+), 22 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a3b55fb2315..16632ce4cbd 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1334,7 +1334,7 @@ "description": "gallivm: Consider the initial mask when terminating loops", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/auxiliary/gallivm/lp_bld_ir_common.c b/src/gallium/auxiliary/gallivm/lp_bld_ir_common.c index 17212874152..f2d6eadeef0 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_ir_common.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_ir_common.c @@ -27,6 +27,7 @@ **************************************************************************/ #include "util/u_memory.h" +#include "lp_bld_const.h" #include "lp_bld_type.h" #include "lp_bld_init.h" #include "lp_bld_flow.h" @@ -271,18 +272,17 @@ void lp_exec_bgnloop(struct lp_exec_mask *mask, bool load) } void lp_exec_endloop(struct gallivm_state *gallivm, - struct lp_exec_mask *mask) + struct lp_exec_mask *exec_mask, + struct lp_build_mask_context *mask) { - LLVMBuilderRef builder = mask->bld->gallivm->builder; - struct function_ctx *ctx = func_ctx(mask); + LLVMBuilderRef builder = exec_mask->bld->gallivm->builder; + struct function_ctx *ctx = func_ctx(exec_mask); LLVMBasicBlockRef endloop; - LLVMTypeRef int_type = LLVMInt32TypeInContext(mask->bld->gallivm->context); - LLVMTypeRef reg_type = LLVMIntTypeInContext(gallivm->context, - mask->bld->type.width * - mask->bld->type.length); + LLVMTypeRef int_type = LLVMInt32TypeInContext(exec_mask->bld->gallivm->context); + LLVMTypeRef mask_type = LLVMIntTypeInContext(exec_mask->bld->gallivm->context, exec_mask->bld->type.length); LLVMValueRef i1cond, i2cond, icond, limiter; - assert(mask->break_mask); + assert(exec_mask->break_mask); assert(ctx->loop_stack_size); if (ctx->loop_stack_size > LP_MAX_TGSI_NESTING) { @@ -294,14 +294,14 @@ void lp_exec_endloop(struct gallivm_state *gallivm, /* * Restore the cont_mask, but don't pop */ - mask->cont_mask = ctx->loop_stack[ctx->loop_stack_size - 1].cont_mask; - lp_exec_mask_update(mask); + exec_mask->cont_mask = ctx->loop_stack[ctx->loop_stack_size - 1].cont_mask; + lp_exec_mask_update(exec_mask); /* * Unlike the continue mask, the break_mask must be preserved across loop * iterations */ - LLVMBuildStore(builder, mask->break_mask, ctx->break_var); + LLVMBuildStore(builder, exec_mask->break_mask, ctx->break_var); /* Decrement the loop limiter */ limiter = LLVMBuildLoad2(builder, int_type, ctx->loop_limiter, ""); @@ -314,12 +314,18 @@ void lp_exec_endloop(struct gallivm_state *gallivm, LLVMBuildStore(builder, limiter, ctx->loop_limiter); - /* i1cond = (mask != 0) */ + LLVMValueRef end_mask = exec_mask->exec_mask; + if (mask) + end_mask = LLVMBuildAnd(builder, exec_mask->exec_mask, lp_build_mask_value(mask), ""); + end_mask = LLVMBuildICmp(builder, LLVMIntNE, end_mask, lp_build_zero(gallivm, exec_mask->bld->type), ""); + end_mask = LLVMBuildBitCast(builder, end_mask, mask_type, ""); + + /* i1cond = (end_mask != 0) */ i1cond = LLVMBuildICmp( builder, LLVMIntNE, - LLVMBuildBitCast(builder, mask->exec_mask, reg_type, ""), - LLVMConstNull(reg_type), "i1cond"); + end_mask, + LLVMConstNull(mask_type), "i1cond"); /* i2cond = (looplimiter > 0) */ i2cond = LLVMBuildICmp( @@ -331,7 +337,7 @@ void lp_exec_endloop(struct gallivm_state *gallivm, /* if( i1cond && i2cond ) */ icond = LLVMBuildAnd(builder, i1cond, i2cond, ""); - endloop = lp_build_insert_new_block(mask->bld->gallivm, "endloop"); + endloop = lp_build_insert_new_block(exec_mask->bld->gallivm, "endloop"); LLVMBuildCondBr(builder, icond, ctx->loop_block, endloop); @@ -341,14 +347,14 @@ void lp_exec_endloop(struct gallivm_state *gallivm, assert(ctx->loop_stack_size); --ctx->loop_stack_size; --ctx->bgnloop_stack_size; - mask->cont_mask = ctx->loop_stack[ctx->loop_stack_size].cont_mask; - mask->break_mask = ctx->loop_stack[ctx->loop_stack_size].break_mask; + exec_mask->cont_mask = ctx->loop_stack[ctx->loop_stack_size].cont_mask; + exec_mask->break_mask = ctx->loop_stack[ctx->loop_stack_size].break_mask; ctx->loop_block = ctx->loop_stack[ctx->loop_stack_size].loop_block; ctx->break_var = ctx->loop_stack[ctx->loop_stack_size].break_var; ctx->break_type = ctx->break_type_stack[ctx->loop_stack_size + ctx->switch_stack_size]; - lp_exec_mask_update(mask); + lp_exec_mask_update(exec_mask); } void lp_exec_mask_cond_push(struct lp_exec_mask *mask, diff --git a/src/gallium/auxiliary/gallivm/lp_bld_ir_common.h b/src/gallium/auxiliary/gallivm/lp_bld_ir_common.h index 0e0a7f74f1b..0def76ebd92 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_ir_common.h +++ b/src/gallium/auxiliary/gallivm/lp_bld_ir_common.h @@ -101,6 +101,8 @@ struct lp_exec_mask { int function_stack_size; }; +struct lp_build_mask_context; + void lp_exec_mask_function_init(struct lp_exec_mask *mask, int function_idx); void lp_exec_mask_init(struct lp_exec_mask *mask, struct lp_build_context *bld); void lp_exec_mask_fini(struct lp_exec_mask *mask); @@ -112,7 +114,8 @@ void lp_exec_mask_update(struct lp_exec_mask *mask); void lp_exec_bgnloop_post_phi(struct lp_exec_mask *mask); void lp_exec_bgnloop(struct lp_exec_mask *mask, bool load_mask); void lp_exec_endloop(struct gallivm_state *gallivm, - struct lp_exec_mask *mask); + struct lp_exec_mask *exec_mask, + struct lp_build_mask_context *mask); void lp_exec_mask_cond_push(struct lp_exec_mask *mask, LLVMValueRef val); void lp_exec_mask_cond_invert(struct lp_exec_mask *mask); diff --git a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c index 9a730ad6c66..fc440e9c71e 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_nir_soa.c @@ -2024,7 +2024,7 @@ static void bgnloop(struct lp_build_nir_context *bld_base) static void endloop(struct lp_build_nir_context *bld_base) { struct lp_build_nir_soa_context *bld = (struct lp_build_nir_soa_context *)bld_base; - lp_exec_endloop(bld_base->base.gallivm, &bld->exec_mask); + lp_exec_endloop(bld_base->base.gallivm, &bld->exec_mask, bld->mask); } static void if_cond(struct lp_build_nir_context *bld_base, LLVMValueRef cond) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c index d4b0f8846c2..6b2a10e1b8a 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c @@ -4268,7 +4268,7 @@ endloop_emit( { struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base); - lp_exec_endloop(bld_base->base.gallivm, &bld->exec_mask); + lp_exec_endloop(bld_base->base.gallivm, &bld->exec_mask, bld->mask); } static void From 83250a30aa61228f388d94ce951e766084841c17 Mon Sep 17 00:00:00 2001 From: Konstantin Seurer Date: Thu, 22 Feb 2024 15:39:46 +0100 Subject: [PATCH 63/90] ci: Update llvmpipe trace checksums Part-of: (cherry picked from commit 3fed272da7eb1895f726e369ef947f4394dde957) --- .pick_status.json | 2 +- src/gallium/drivers/llvmpipe/ci/traces-llvmpipe.yml | 2 +- src/gallium/drivers/virgl/ci/traces-virgl.yml | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 16632ce4cbd..f02293c1db9 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1314,7 +1314,7 @@ "description": "ci: Update llvmpipe trace checksums", "nominated": false, "nomination_type": 3, - "resolution": 4, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/llvmpipe/ci/traces-llvmpipe.yml b/src/gallium/drivers/llvmpipe/ci/traces-llvmpipe.yml index 57a0bfda02a..14edd04c9b0 100644 --- a/src/gallium/drivers/llvmpipe/ci/traces-llvmpipe.yml +++ b/src/gallium/drivers/llvmpipe/ci/traces-llvmpipe.yml @@ -111,7 +111,7 @@ traces: checksum: 58a6a276abc0e28fcb2a8acea3342712 gputest/pixmark-piano-v2.trace: gl-vmware-llvmpipe: - checksum: edc09da55fea262e76686d99548f2cfd + checksum: b0077264046fe6dd2cdec059d9e53bf5 gputest/triangle-v2.trace: gl-vmware-llvmpipe: checksum: 7812de00011a3a059892e36cea19c696 diff --git a/src/gallium/drivers/virgl/ci/traces-virgl.yml b/src/gallium/drivers/virgl/ci/traces-virgl.yml index bf5fcc8539b..44f04175082 100644 --- a/src/gallium/drivers/virgl/ci/traces-virgl.yml +++ b/src/gallium/drivers/virgl/ci/traces-virgl.yml @@ -12,7 +12,7 @@ traces: checksum: 57ddd36b117adc9216c65c10d914a37e gputest/pixmark-piano-v2.trace: gl-virgl: - checksum: cbe50265c2d1a114fd75bf12407fbad9 + checksum: 3b760606c18aebda1ad0eff6eb03203a gputest/triangle-v2.trace: gl-virgl: checksum: 7812de00011a3a059892e36cea19c696 From 40ab1da1b4a1dac7de590fc9d9fc9b2ac7b39784 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michel=20D=C3=A4nzer?= Date: Wed, 21 Feb 2024 10:40:33 +0100 Subject: [PATCH 64/90] egl/wayland: Flush after blitting to linear copy We need to flush after blitting to the linear copy, or the Wayland compositor may not see the correct linear buffer contents. v2: * Keep blitImage call in the same place (Daniel Stone) * Add second flush for the blit to linear copy Fixes: 58f90fd03f4a ("egl/wayland: fix glthread crashes") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9816 Part-of: (cherry picked from commit 7a6836611e39cf00c32b6e189ca7eb2f370d68fe) --- .pick_status.json | 2 +- src/egl/drivers/dri2/platform_wayland.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index f02293c1db9..b1a1cb46675 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1114,7 +1114,7 @@ "description": "egl/wayland: Flush after blitting to linear copy", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "58f90fd03f4aaf2ee19010e9cbd9cee2deda9711", "notes": null diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c index ec33aeebbab..4105c2bfe4d 100644 --- a/src/egl/drivers/dri2/platform_wayland.c +++ b/src/egl/drivers/dri2/platform_wayland.c @@ -1643,6 +1643,12 @@ dri2_wl_swap_buffers_with_damage(_EGLDisplay *disp, _EGLSurface *draw, dri2_surf->current->dri_image, 0, 0, dri2_surf->base.Width, dri2_surf->base.Height, 0, 0, dri2_surf->base.Width, dri2_surf->base.Height, 0); + + if (dri2_dpy->flush) { + __DRIdrawable *dri_drawable = dri2_dpy->vtbl->get_dri_drawable(draw); + + dri2_dpy->flush->flush(dri_drawable); + } } wl_surface_commit(dri2_surf->wl_surface_wrapper); From aead18c79d4e9742d1b86cbfe0a9c3238e91ee2e Mon Sep 17 00:00:00 2001 From: Chris Rankin Date: Wed, 21 Feb 2024 16:37:58 +0000 Subject: [PATCH 65/90] vdpau: Refactor query for video surface formats. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10614 Signed-off-by: Chris Rankin Reviewed-by: Leo Liu Part-of: (cherry picked from commit c3ceec6cd8533a5a5f3ccaf687308dee2f097a99) --- .pick_status.json | 2 +- src/gallium/auxiliary/vl/vl_video_buffer.c | 16 +++++----- src/gallium/frontends/vdpau/query.c | 37 ++++++++++++---------- 3 files changed, 30 insertions(+), 25 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index b1a1cb46675..626573fae41 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -914,7 +914,7 @@ "description": "vdpau: Refactor query for video surface formats.", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/auxiliary/vl/vl_video_buffer.c b/src/gallium/auxiliary/vl/vl_video_buffer.c index 4d95f762510..69cc4563df7 100644 --- a/src/gallium/auxiliary/vl/vl_video_buffer.c +++ b/src/gallium/auxiliary/vl/vl_video_buffer.c @@ -118,21 +118,21 @@ vl_video_buffer_is_format_supported(struct pipe_screen *screen, vl_get_video_buffer_formats(screen, format, resource_formats); for (i = 0; i < VL_NUM_COMPONENTS; ++i) { - enum pipe_format format = resource_formats[i]; + enum pipe_format fmt = resource_formats[i]; - if (format == PIPE_FORMAT_NONE) + if (fmt == PIPE_FORMAT_NONE) continue; /* we at least need to sample from it */ - if (!screen->is_format_supported(screen, format, PIPE_TEXTURE_2D, 0, 0, PIPE_BIND_SAMPLER_VIEW)) - return false; + if (!screen->is_format_supported(screen, fmt, PIPE_TEXTURE_2D, 0, 0, PIPE_BIND_SAMPLER_VIEW)) + continue; - format = vl_video_buffer_surface_format(format); - if (!screen->is_format_supported(screen, format, PIPE_TEXTURE_2D, 0, 0, PIPE_BIND_RENDER_TARGET)) - return false; + fmt = vl_video_buffer_surface_format(fmt); + if (screen->is_format_supported(screen, fmt, PIPE_TEXTURE_2D, 0, 0, PIPE_BIND_RENDER_TARGET)) + return true; } - return true; + return false; } unsigned diff --git a/src/gallium/frontends/vdpau/query.c b/src/gallium/frontends/vdpau/query.c index 158256b961b..6c48e9e8c12 100644 --- a/src/gallium/frontends/vdpau/query.c +++ b/src/gallium/frontends/vdpau/query.c @@ -108,6 +108,8 @@ vlVdpVideoSurfaceQueryGetPutBitsYCbCrCapabilities(VdpDevice device, VdpChromaTyp { vlVdpDevice *dev; struct pipe_screen *pscreen; + VdpYCbCrFormat ycbcrFormat; + bool supported; if (!is_supported) return VDP_STATUS_INVALID_POINTER; @@ -122,47 +124,50 @@ vlVdpVideoSurfaceQueryGetPutBitsYCbCrCapabilities(VdpDevice device, VdpChromaTyp mtx_lock(&dev->mutex); + ycbcrFormat = bits_ycbcr_format; switch(bits_ycbcr_format) { case VDP_YCBCR_FORMAT_NV12: - *is_supported = surface_chroma_type == VDP_CHROMA_TYPE_420; + supported = surface_chroma_type == VDP_CHROMA_TYPE_420; break; case VDP_YCBCR_FORMAT_YV12: - *is_supported = surface_chroma_type == VDP_CHROMA_TYPE_420; + supported = surface_chroma_type == VDP_CHROMA_TYPE_420; /* We can convert YV12 to NV12 on the fly! */ - if (*is_supported && - pscreen->is_video_format_supported(pscreen, - PIPE_FORMAT_NV12, - PIPE_VIDEO_PROFILE_UNKNOWN, - PIPE_VIDEO_ENTRYPOINT_BITSTREAM)) { - mtx_unlock(&dev->mutex); - return VDP_STATUS_OK; - } + ycbcrFormat = VDP_YCBCR_FORMAT_NV12; break; case VDP_YCBCR_FORMAT_UYVY: case VDP_YCBCR_FORMAT_YUYV: - *is_supported = surface_chroma_type == VDP_CHROMA_TYPE_422; + supported = surface_chroma_type == VDP_CHROMA_TYPE_422; break; case VDP_YCBCR_FORMAT_Y8U8V8A8: case VDP_YCBCR_FORMAT_V8U8Y8A8: - *is_supported = surface_chroma_type == VDP_CHROMA_TYPE_444; + supported = surface_chroma_type == VDP_CHROMA_TYPE_444; + break; + + case VDP_YCBCR_FORMAT_P010: + case VDP_YCBCR_FORMAT_P016: + /* Do any other profiles imply support for this chroma type? */ + supported = (surface_chroma_type == VDP_CHROMA_TYPE_420_16) + && vl_codec_supported(pscreen, PIPE_VIDEO_PROFILE_HEVC_MAIN_10, false); break; default: - *is_supported = false; + supported = false; break; } - if (*is_supported && + if (supported && !pscreen->is_video_format_supported(pscreen, - FormatYCBCRToPipe(bits_ycbcr_format), + FormatYCBCRToPipe(ycbcrFormat), PIPE_VIDEO_PROFILE_UNKNOWN, PIPE_VIDEO_ENTRYPOINT_BITSTREAM)) { - *is_supported = false; + supported = false; } + *is_supported = supported; + mtx_unlock(&dev->mutex); return VDP_STATUS_OK; From d2c6a48ee914ec9042dc88a17b8f86bd891c27be Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 22 Feb 2024 16:12:33 +0200 Subject: [PATCH 66/90] intel/nir: only consider ray query variables in lowering Signed-off-by: Lionel Landwerlin Cc: mesa-stable Reviewed-by: Ivan Briano Part-of: (cherry picked from commit abeac8cf96d9fbba3126339b2a62005ba8fd2dfc) --- .pick_status.json | 2 +- src/intel/compiler/brw_nir_lower_ray_queries.c | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 626573fae41..f01d1cbe33d 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -24,7 +24,7 @@ "description": "intel/nir: only consider ray query variables in lowering", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/compiler/brw_nir_lower_ray_queries.c b/src/intel/compiler/brw_nir_lower_ray_queries.c index bcade17e803..844b90da47b 100644 --- a/src/intel/compiler/brw_nir_lower_ray_queries.c +++ b/src/intel/compiler/brw_nir_lower_ray_queries.c @@ -543,8 +543,11 @@ brw_nir_lower_ray_queries(nir_shader *shader, }; /* Map all query variable to internal type variables */ - nir_foreach_function_temp_variable(var, state.impl) + nir_foreach_function_temp_variable(var, state.impl) { + if (!var->data.ray_query) + continue; register_opaque_var(var, &state); + } hash_table_foreach(state.queries, entry) create_internal_var(entry->data, &state); From f5311e2418ac64b5a51d68041593a3e335bd0b36 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Thu, 22 Feb 2024 08:56:20 +0200 Subject: [PATCH 67/90] anv: limit depth flush on dynamic render pass suspend Signed-off-by: Lionel Landwerlin Reviewed-by: Ivan Briano Reviewed-by: Paulo Zanoni Cc: mesa-stable Part-of: (cherry picked from commit 642b12baef65889000c47d0efd8f0cdf2e49cad5) --- .pick_status.json | 2 +- src/intel/vulkan/genX_cmd_buffer.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index f01d1cbe33d..7ecbe813666 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -14,7 +14,7 @@ "description": "anv: limit depth flush on dynamic render pass suspend", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index eb3be7de5ad..203bf15c856 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -8370,8 +8370,9 @@ void genX(CmdEndRendering)( "MSAA resolve"); } - if (gfx->depth_att.resolve_mode != VK_RESOLVE_MODE_NONE || - gfx->stencil_att.resolve_mode != VK_RESOLVE_MODE_NONE) { + if (!(gfx->rendering_flags & VK_RENDERING_SUSPENDING_BIT) && + (gfx->depth_att.resolve_mode != VK_RESOLVE_MODE_NONE || + gfx->stencil_att.resolve_mode != VK_RESOLVE_MODE_NONE)) { /* We are about to do some MSAA resolves. We need to flush so that the * result of writes to the MSAA depth attachments show up in the sampler * when we blit to the single-sampled resolve target. From 313a9e6b7386e8433b3f23422ba469f39384f3fd Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Mon, 26 Feb 2024 12:19:40 +0000 Subject: [PATCH 68/90] .pick_status.json: Update to 4071c399a27932ea9253eb8a65d5725504bac6f3 --- .pick_status.json | 370 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 370 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index 7ecbe813666..aed3d5e27f6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,374 @@ [ + { + "sha": "4071c399a27932ea9253eb8a65d5725504bac6f3", + "description": "radv: compute the total LDS usage in gfx10_get_ngg_info()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "d85311b120605d1c3c6b9c0a681e8ea59323ab90", + "description": "radv: compute NGG scratch LDS base in gfx10_get_ngg_info()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "0570d40d5b367c4d44fd8e89e68dafd2f79b7327", + "description": "radv: determine NGG culling info before NGG info", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "e3863a22bbf3c322a4370dea6bed69bbf51028fa", + "description": "radv: pass radv_shader_info to gfx10_get_ngg_info()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4db0952639ec72f7784d87ccd3a6cf47e7bdb6be", + "description": "radv: pass gfx10_ngg_info to gfx10_get_ngg_info()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "beb2e7df6823fe291e4b4f313fbed903891beac9", + "description": "radv: determine NGG query info before linking shader info", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "64f46c83a34a70090de36cb6dd387f0a10f656d4", + "description": "radv: use so.num_outputs to determine if NGG shaders need XFB queries", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "7f8a84a0246e62b30c2f8587d169c7d7ad82cb91", + "description": "radv: do not set gs.has_pipeline_stat_query twice for NGG GS", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "6c1e82e309f2e0bbf50edfada6bb10651308aa36", + "description": "radv: remove unused parameter in gfx10_get_ngg_query_info()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "e9169881dbd1f72eab65a68c2b8e7643f74489b7", + "description": "anv: add missing generated file dep", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "5816b5961f5bc0c034450ab6f1779a64f31e8293", + "description": "zink: use new flag to determine whether swapchain readback cache is usable", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "01c9199cb8cc32ff6d6eda993c173bdc37081aed", + "description": "zink: only update swapchain readback cache when necessary", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "8fb83c0935948c3bf0717e0a3d9ea3ba4cdf4f6c", + "description": "zink: only update swapchain readback cache on create if necessary", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "417a1986fb17ae3d65bd57a8fb3efea7bda90752", + "description": "zink: set and manage a flag indicating that swapchain readback needs updating", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "114a5da7905520ec8626beee885572dc386a383c", + "description": "zink: update swapchain readback cache on create", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "7486aaa1c0ea8dda75ecddf631ebab9064d2b161", + "description": "zink: make readback attempts count towards ZINK_READBACK_THRESHOLD", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "d5d5f54fe9d9065c2476e520d8007c76f38b1839", + "description": "zink: add a swapchain readback case for reading differently-acquired image", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "ae80f9ce65d46c0680d2c5b4e60f3b9a9f879a8b", + "description": "zink: make kopper_swapchain_image::acquired the resource that acquired it", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "d2ed77072cfa354862843789f30b7702feeb9c70", + "description": "zink: flag acquired swapchain image as readback target on acquire, not present", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "c3a2e2f9f2e4be1e11792c01f3b9a2748dce6acb", + "description": "zink: lock buffer age when chundering swapchain for readback", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "c123ab213797c1d0d2a34e57c503428261324cc6", + "notes": null + }, + { + "sha": "9fa2d9bd50e6d464e102111c66a14cb1b20c5e0b", + "description": "zink: fix swapchain readback conditional", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "50b671c1c39ebae5131723b8e4e10a6653f6c464", + "description": "zink: fix (dynamic rendering) execution of scissored clears during flush", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "e6020355969c8f6a78e1698b2c31539055e5698e", + "description": "zink: clamp in_rp clears to fb size", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "e032e7f6cce48acd840a6439a864b82d36851830", + "description": "zink: don't pre-init null fbfetch info", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "5fdbb0868ac5eb73055745de57575c694ae90a46", + "description": "zink: start out with 256x256 sized dummy surfaces", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "aaf78eadf3734dfcc43faa5c7e6a257accaf09db", + "description": "zink: create/resize dummy surfaces on-demand", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "1ea64063c8e4a99a34d70cfc415ed6d4663996b5", + "description": "zink: break out null fbfetch init for descriptor buffer", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "263d26202558a503610470209a07850c4ee54152", + "description": "zink: also set null fbfetch surfaces when no fb surface is bound", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "f3347a4603b55e2650071765767725b77379bc0b", + "description": "zink: don't pre-init dummy fbfetch surface when missing nullDescriptor feature", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "fe13841a99a39e8acf1e73c8495ccfcc91ffa81e", + "description": "zink: move flagging rp_changed in zink_update_fbfetch() to caller", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "35185ad9df8efa84981607cec3dd495c875a534b", + "description": "zink: assert that batch_id is valid in zink_screen_check_last_finished()", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "3283415bbd9d291a20a2e02e1a76f6b1b4984eda", + "description": "zink: fix longstanding issue with active batch state recycling", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "16103b61e7dae3ac426fcc523a1a9b18a3c71e8e", + "description": "zink: only scan active batch states for free states if > 1 exist", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "2179a7f4d7da3becfebe4f520e0db3471fc3ea3f", + "description": "Add Xilinx ZynqMP KMSRO entrypoint", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4499871e34cd316fcafe66e621828c5fd1d5488f", + "description": "nvk: Advertise VK+KHR_incremental_present", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "b3fd66c8899a1e8946173ef805b3b427b3d60eed", + "description": "nvk: Only expose VK_KHR_present_id/wait when we have WSI", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "726ae2570ce27a2d417d4a5442dcb56b461c106d", + "description": "v3dv/ci: update expected list", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, { "sha": "423add61e2d5b6ab6b5505d1feec01b93609f8fc", "description": "gallium: lima: Don't round height when checking alignment", From 2728e5f2ccd52ca7ae93313025ae49298ac08df8 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 21 Feb 2024 11:02:26 -0500 Subject: [PATCH 69/90] zink: only scan active batch states for free states if > 1 exist trying to recycle the current active batch state is never going to be productive cc: mesa-stable Part-of: (cherry picked from commit 16103b61e7dae3ac426fcc523a1a9b18a3c71e8e) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_batch.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index aed3d5e27f6..34c19777f17 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -324,7 +324,7 @@ "description": "zink: only scan active batch states for free states if > 1 exist", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_batch.c b/src/gallium/drivers/zink/zink_batch.c index 769ba4f212c..0da8db47713 100644 --- a/src/gallium/drivers/zink/zink_batch.c +++ b/src/gallium/drivers/zink/zink_batch.c @@ -458,8 +458,8 @@ get_batch_state(struct zink_context *ctx, struct zink_batch *batch) } simple_mtx_unlock(&screen->free_batch_states_lock); } - if (!bs && ctx->batch_states) { - /* states are stored sequentially, so if the first one doesn't work, none of them will */ + /* states are stored sequentially, so if the first one doesn't work, none of them will */ + if (!bs && ctx->batch_states && ctx->batch_states->next) { if (zink_screen_check_last_finished(screen, ctx->batch_states->fence.batch_id) || find_unused_state(ctx->batch_states)) { bs = ctx->batch_states; From ab000d795136a672302673038924234587686940 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 21 Feb 2024 11:04:51 -0500 Subject: [PATCH 70/90] zink: fix longstanding issue with active batch state recycling the previous code could recycle a currently-submitting state by hitting a race condition where zink_screen_check_last_finished(batch_id) returned true because batch_id was 0 this can no longer recycle the current batch, but the race should still be eliminated for consistency: check 'submitted' since this guarantees batch_id is valid cc: mesa-stable Part-of: (cherry picked from commit 3283415bbd9d291a20a2e02e1a76f6b1b4984eda) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_batch.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 34c19777f17..4594d0b9bba 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -314,7 +314,7 @@ "description": "zink: fix longstanding issue with active batch state recycling", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_batch.c b/src/gallium/drivers/zink/zink_batch.c index 0da8db47713..5891e0a9fb7 100644 --- a/src/gallium/drivers/zink/zink_batch.c +++ b/src/gallium/drivers/zink/zink_batch.c @@ -460,8 +460,11 @@ get_batch_state(struct zink_context *ctx, struct zink_batch *batch) } /* states are stored sequentially, so if the first one doesn't work, none of them will */ if (!bs && ctx->batch_states && ctx->batch_states->next) { - if (zink_screen_check_last_finished(screen, ctx->batch_states->fence.batch_id) || - find_unused_state(ctx->batch_states)) { + /* only a submitted state can be reused */ + if (p_atomic_read(&ctx->batch_states->fence.submitted) && + /* a submitted state must have completed before it can be reused */ + (zink_screen_check_last_finished(screen, ctx->batch_states->fence.batch_id) || + p_atomic_read(&ctx->batch_states->fence.completed))) { bs = ctx->batch_states; pop_batch_state(ctx); } From ffd79476ece07abf41219199e4916a2963a63bb0 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Wed, 21 Feb 2024 11:10:10 -0500 Subject: [PATCH 71/90] zink: assert that batch_id is valid in zink_screen_check_last_finished() 0 is never a valid batch_id cc: mesa-stable Part-of: (cherry picked from commit 35185ad9df8efa84981607cec3dd495c875a534b) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_screen.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 4594d0b9bba..cb5435e1b82 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -304,7 +304,7 @@ "description": "zink: assert that batch_id is valid in zink_screen_check_last_finished()", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_screen.h b/src/gallium/drivers/zink/zink_screen.h index 886700b65ad..c907bc6e85d 100644 --- a/src/gallium/drivers/zink/zink_screen.h +++ b/src/gallium/drivers/zink/zink_screen.h @@ -61,6 +61,7 @@ static inline bool zink_screen_check_last_finished(struct zink_screen *screen, uint32_t batch_id) { const uint32_t check_id = (uint32_t)batch_id; + assert(check_id); /* last_finished may have wrapped */ if (screen->last_finished < UINT_MAX / 2) { /* last_finished has wrapped, batch_id has not */ From baba35ed693c17d474d495fc56b2f297aa97ebaa Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 22 Feb 2024 07:27:15 -0500 Subject: [PATCH 72/90] zink: clamp in_rp clears to fb size this was almost sort of clamping except that it wasn't cc: mesa-stable Part-of: (cherry picked from commit e6020355969c8f6a78e1698b2c31539055e5698e) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_clear.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index cb5435e1b82..732e960c51a 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -224,7 +224,7 @@ "description": "zink: clamp in_rp clears to fb size", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_clear.c b/src/gallium/drivers/zink/zink_clear.c index c417b62c811..dd1684a33f9 100644 --- a/src/gallium/drivers/zink/zink_clear.c +++ b/src/gallium/drivers/zink/zink_clear.c @@ -98,8 +98,8 @@ clear_in_rp(struct pipe_context *pctx, return; cr.rect.offset.x = scissor_state->minx; cr.rect.offset.y = scissor_state->miny; - cr.rect.extent.width = MIN2(fb->width, scissor_state->maxx - scissor_state->minx); - cr.rect.extent.height = MIN2(fb->height, scissor_state->maxy - scissor_state->miny); + cr.rect.extent.width = MIN2(fb->width - cr.rect.offset.x, scissor_state->maxx - scissor_state->minx); + cr.rect.extent.height = MIN2(fb->height - cr.rect.offset.y, scissor_state->maxy - scissor_state->miny); } else { cr.rect.extent.width = fb->width; cr.rect.extent.height = fb->height; From 850c9dbdc958dcc9357eda48833ecd4b6b15e47a Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Thu, 22 Feb 2024 09:08:32 -0500 Subject: [PATCH 73/90] zink: fix (dynamic rendering) execution of scissored clears during flush in the case where the renderpass did not change, this would otherwise have skipped the mask composition for in-rp clears cc: mesa-stable Part-of: (cherry picked from commit 50b671c1c39ebae5131723b8e4e10a6653f6c464) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_context.c | 27 +++++++++++++++++++++---- 2 files changed, 24 insertions(+), 5 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 732e960c51a..7b5dcf67148 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -214,7 +214,7 @@ "description": "zink: fix (dynamic rendering) execution of scissored clears during flush", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_context.c b/src/gallium/drivers/zink/zink_context.c index 6616be2f612..efc8120dc02 100644 --- a/src/gallium/drivers/zink/zink_context.c +++ b/src/gallium/drivers/zink/zink_context.c @@ -2847,6 +2847,29 @@ begin_rendering(struct zink_context *ctx) ctx->dynamic_fb.attachments[PIPE_MAX_COLOR_BUFS+1].loadOp = VK_ATTACHMENT_LOAD_OP_CLEAR; } } + } + if (changed_size || changed_layout) + ctx->rp_changed = true; + ctx->rp_loadop_changed = false; + ctx->rp_layout_changed = false; + } + /* always assemble clear_buffers mask: + * if a scissored clear must be triggered during glFlush, + * the renderpass metadata may be unchanged (e.g., LOAD from previous rp), + * but the buffer mask must still be returned + */ + if (ctx->clears_enabled) { + for (int i = 0; i < ctx->fb_state.nr_cbufs; i++) { + /* these are no-ops */ + if (!ctx->fb_state.cbufs[i] || !zink_fb_clear_enabled(ctx, i)) + continue; + /* these need actual clear calls inside the rp */ + if (zink_fb_clear_needs_explicit(&ctx->fb_clears[i])) + clear_buffers |= (PIPE_CLEAR_COLOR0 << i); + } + if (ctx->fb_state.zsbuf && zink_fb_clear_enabled(ctx, PIPE_MAX_COLOR_BUFS)) { + struct zink_framebuffer_clear *fb_clear = &ctx->fb_clears[PIPE_MAX_COLOR_BUFS]; + struct zink_framebuffer_clear_data *clear = zink_fb_clear_element(fb_clear, 0); if (zink_fb_clear_needs_explicit(fb_clear)) { for (int j = !zink_fb_clear_element_needs_explicit(clear); (clear_buffers & PIPE_CLEAR_DEPTHSTENCIL) != PIPE_CLEAR_DEPTHSTENCIL && j < zink_fb_clear_count(fb_clear); @@ -2854,10 +2877,6 @@ begin_rendering(struct zink_context *ctx) clear_buffers |= zink_fb_clear_element(fb_clear, j)->zs.bits; } } - if (changed_size || changed_layout) - ctx->rp_changed = true; - ctx->rp_loadop_changed = false; - ctx->rp_layout_changed = false; } if (!ctx->rp_changed && ctx->batch.in_rp) From cf0ed80d3a33be586edd9529cadfa6a5f0410830 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Fri, 9 Feb 2024 10:38:59 -0500 Subject: [PATCH 74/90] zink: lock buffer age when chundering swapchain for readback this sequence doesn't count as SwapBuffers calls, so age cannot be modified Fixes: c123ab21379 ("kopper: Implement {EGL,GLX}_EXT_buffer_age") Part-of: (cherry picked from commit c3a2e2f9f2e4be1e11792c01f3b9a2748dce6acb) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_kopper.c | 19 ++++++++++++++----- src/gallium/drivers/zink/zink_kopper.h | 2 ++ 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 7b5dcf67148..940214c187b 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -194,7 +194,7 @@ "description": "zink: lock buffer age when chundering swapchain for readback", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "c123ab213797c1d0d2a34e57c503428261324cc6", "notes": null diff --git a/src/gallium/drivers/zink/zink_kopper.c b/src/gallium/drivers/zink/zink_kopper.c index bda4c206877..5fd6fd44369 100644 --- a/src/gallium/drivers/zink/zink_kopper.c +++ b/src/gallium/drivers/zink/zink_kopper.c @@ -812,11 +812,13 @@ zink_kopper_present_queue(struct zink_screen *screen, struct zink_resource *res) * * Any other color buffers' ages are incremented by 1 if * their age was previously greater than 0. */ - for (int i = 0; i < cdt->swapchain->num_images; i++) { - if (i == res->obj->dt_idx) - cdt->swapchain->images[i].age = 1; - else if (cdt->swapchain->images[i].age > 0) - cdt->swapchain->images[i].age += 1; + if (!cdt->age_locked) { + for (int i = 0; i < cdt->swapchain->num_images; i++) { + if (i == res->obj->dt_idx) + cdt->swapchain->images[i].age = 1; + else if (cdt->swapchain->images[i].age > 0) + cdt->swapchain->images[i].age += 1; + } } if (util_queue_is_initialized(&screen->flush_queue)) { p_atomic_inc(&cpi->swapchain->async_presents); @@ -873,14 +875,17 @@ zink_kopper_acquire_readback(struct zink_context *ctx, struct zink_resource *res if (++cdt->readback_counter >= ZINK_READBACK_THRESHOLD) kopper_ensure_readback(screen, res); while (res->obj->dt_idx != last_dt_idx) { + cdt->age_locked = true; if (res->obj->dt_idx != UINT32_MAX && !zink_kopper_present_readback(ctx, res)) break; + cdt->age_locked = true; do { ret = kopper_acquire(screen, res, 0); } while (!is_swapchain_kill(ret) && (ret == VK_NOT_READY || ret == VK_TIMEOUT)); if (is_swapchain_kill(ret)) { kill_swapchain(ctx, res); *readback = NULL; + cdt->age_locked = false; return false; } } @@ -936,6 +941,10 @@ zink_kopper_present_readback(struct zink_context *ctx, struct zink_resource *res simple_mtx_lock(&screen->semaphores_lock); util_dynarray_append(&screen->semaphores, VkSemaphore, acquire); simple_mtx_unlock(&screen->semaphores_lock); + + struct kopper_displaytarget *cdt = res->obj->dt; + cdt->age_locked = false; + return zink_screen_handle_vkresult(screen, error); } diff --git a/src/gallium/drivers/zink/zink_kopper.h b/src/gallium/drivers/zink/zink_kopper.h index f930f282e2e..24614bbe376 100644 --- a/src/gallium/drivers/zink/zink_kopper.h +++ b/src/gallium/drivers/zink/zink_kopper.h @@ -95,6 +95,8 @@ struct kopper_displaytarget bool is_kill; VkPresentModeKHR present_mode; unsigned readback_counter; + + bool age_locked; //disables buffer age during readback }; struct zink_context; From 20cc365eb2ea772a649b628fb5bc2180ab226981 Mon Sep 17 00:00:00 2001 From: Mike Blumenkrantz Date: Fri, 9 Feb 2024 10:47:46 -0500 Subject: [PATCH 75/90] zink: flag acquired swapchain image as readback target on acquire, not present readback should trigger on the current backbuffer, not the most recently presented buffer. if e.g., a clear is only triggered through glFlush, this clear should be read back rather than the contents of the last-presented buffer cc: mesa-stable Part-of: (cherry picked from commit d2ed77072cfa354862843789f30b7702feeb9c70) --- .pick_status.json | 2 +- src/gallium/drivers/zink/zink_kopper.c | 10 +++++++++- src/gallium/drivers/zink/zink_kopper.h | 3 +++ 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 940214c187b..423addecea4 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -184,7 +184,7 @@ "description": "zink: flag acquired swapchain image as readback target on acquire, not present", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/zink/zink_kopper.c b/src/gallium/drivers/zink/zink_kopper.c index 5fd6fd44369..b4f3e71a4bd 100644 --- a/src/gallium/drivers/zink/zink_kopper.c +++ b/src/gallium/drivers/zink/zink_kopper.c @@ -561,6 +561,8 @@ kopper_acquire(struct zink_screen *screen, struct zink_resource *res, uint64_t t if (cdt->swapchain->images[res->obj->dt_idx].readback) zink_resource(cdt->swapchain->images[res->obj->dt_idx].readback)->valid = false; res->obj->image = cdt->swapchain->images[res->obj->dt_idx].image; + if (!cdt->age_locked) + zink_kopper_update_last_written(res); cdt->swapchain->images[res->obj->dt_idx].acquired = false; if (!cdt->swapchain->images[res->obj->dt_idx].init) { /* swapchain images are initially in the UNDEFINED layout */ @@ -792,7 +794,7 @@ zink_kopper_present_queue(struct zink_screen *screen, struct zink_resource *res) cpi->res = res; cpi->swapchain = cdt->swapchain; cpi->indefinite_acquire = res->obj->indefinite_acquire; - res->obj->last_dt_idx = cpi->image = res->obj->dt_idx; + cpi->image = res->obj->dt_idx; cpi->info.sType = VK_STRUCTURE_TYPE_PRESENT_INFO_KHR; cpi->info.pNext = NULL; cpi->info.waitSemaphoreCount = 1; @@ -834,6 +836,12 @@ zink_kopper_present_queue(struct zink_screen *screen, struct zink_resource *res) res->obj->dt_idx = UINT32_MAX; } +void +zink_kopper_update_last_written(struct zink_resource *res) +{ + res->obj->last_dt_idx = res->obj->dt_idx; +} + static void kopper_ensure_readback(struct zink_screen *screen, struct zink_resource *res) { diff --git a/src/gallium/drivers/zink/zink_kopper.h b/src/gallium/drivers/zink/zink_kopper.h index 24614bbe376..2ebf9f3b212 100644 --- a/src/gallium/drivers/zink/zink_kopper.h +++ b/src/gallium/drivers/zink/zink_kopper.h @@ -121,6 +121,9 @@ zink_kopper_acquired(const struct kopper_displaytarget *cdt, uint32_t idx) return idx != UINT32_MAX && cdt->swapchain->images[idx].acquired; } +void +zink_kopper_update_last_written(struct zink_resource *res); + struct kopper_displaytarget * zink_kopper_displaytarget_create(struct zink_screen *screen, unsigned tex_usage, enum pipe_format format, unsigned width, From c440d7ceef0f105dd97bda08df4061b5344c3d88 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Sun, 25 Feb 2024 22:57:11 +0200 Subject: [PATCH 76/90] anv: add missing generated file dep Signed-off-by: Lionel Landwerlin Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10672 Cc: mesa-stable Acked-by: Mike Blumenkrantz Part-of: (cherry picked from commit e9169881dbd1f72eab65a68c2b8e7643f74489b7) --- .pick_status.json | 2 +- src/intel/vulkan/grl/meson.build | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 423addecea4..dfe9d59141e 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -94,7 +94,7 @@ "description": "anv: add missing generated file dep", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/vulkan/grl/meson.build b/src/intel/vulkan/grl/meson.build index 1bf4c3b4e9f..d611a871b30 100644 --- a/src/intel/vulkan/grl/meson.build +++ b/src/intel/vulkan/grl/meson.build @@ -201,6 +201,6 @@ libgrl = static_library( idep_grl = declare_dependency( link_with : libgrl, dependencies : libgrl_deps, - sources : grl_metakernel_h, + sources : [grl_metakernel_h, grl_cl_kernel_h], include_directories : include_directories('include', 'gpu'), ) From 046ca162a9578c8fff72c7e2a1acfe056a3a738a Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Tue, 27 Feb 2024 21:59:24 +0000 Subject: [PATCH 77/90] .pick_status.json: Update to 82ff9204abab5267f82a9ce73f9dca1541ef5ee6 --- .pick_status.json | 1700 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 1700 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index dfe9d59141e..e3a634bb8d9 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,1704 @@ [ + { + "sha": "82ff9204abab5267f82a9ce73f9dca1541ef5ee6", + "description": "frontends/va: Only set VP9 segmentation fields when segmentation is enabled", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + 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peephole_sel out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "10489b418c6d0ec045fdc8eaa76d0f8ae413d73c", + "description": "intel/brw: Pull bank_conflicts out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "13c312431cc17ddffbd1e799d31cdcb232501474", + "description": "intel/brw: Pull opt_cse out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4f09ad9dee2b9231268dd5d32895268b33d89741", + "description": "intel/brw: Pull opt_combine_constants out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "59bff8adf42b1e1c053bc9636def3be984fff214", + "description": "intel/brw: Pull dead_code_eliminate out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "1bd175f4583681092bb5209bfadd24b48493b102", + "description": "intel/brw: Pull opt_saturate_propagation out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "dc33a8fb06fcbe9797fb1cbc62ce8cb5986fb8f3", + "description": "intel/brw: Pull opt_cmod_propagation out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "6a3329a6c4f7860a0c96d124c0cb3366442d58c4", + "description": "intel/brw: Pull opt_copy_propagation out of fs_visitor", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "0b73d163d48880ebdc7daafeb4e19775382da212", + "description": "intel/brw: Remove Gfx8- passes from optimize()", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "1a4f220c29b8ac9d8dbc83eb829e9780cbc1415a", + "description": "intel/blorp: disable use of REP16 independent of format", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "1adb2e9e959d9de9601b9d5dc8d733a065ac1d1d", + "description": "panfrost: support multi-sampled image load/store", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "c9831a4d34aa9962550bbcb0dad63142d2cccd72", + "description": "panfrost: add lowering pass for multisampled images", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "a8a4bcec362108bf41f34166e8fcff60e6ec7064", + "description": "wsi/wl: check wsi_wl_surface's validity before use", + "nominated": false, + "nomination_type": 1, + "resolution": 4, + "main_sha": null, + "because_sha": "9a00a360ad8bf0e32d41a8d4b4610833d137bb59", + "notes": null + }, + { + "sha": "8ab337047cda1d23f624aa5839742094c3700d2c", + "description": "nvk: Advertise VK_KHR_maintenance5", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "509fdf4fe4fc464be6c06a12f8d9e534d6673410", + "description": "nvk: Use VkPipelineCreateFlags2 flag names", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "a72bcc0a26dd401d5d0a5900fb147fd7b0eb8673", + "description": "vulkan/meta: Handle VK_REMAINING_ARRAY_LAYERS in blit and resolve", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "8ed3aa7b1a8d892061058ed8b383e7d23f778ba4", + "description": "nvk/copy: Handle VK_REMAINING_ARRAY_LAYERS", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "a120022b022b69372464dde759b2a64a94f2b25c", + "description": "nvk: Handle missing gl_PointSize in the last geometry stage", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4287d04e9832196e5fe23c7bc640b0079910ae04", + "description": "nak: Add writes_point_size to nak_shader_info", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "828b3c18fbf54d8e63ab40f2f7affca25a5cb63b", + "description": "nil: Add PIPE_FORMAT_R5G5B5A1_UNORM", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "6825902bb6146a36248cb7d53c8fa2469f73a048", + "description": "treewide: use ralloc_memdup", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "66b00e2966d348a298ebcb4881c01b538058a2ef", + "description": "util/ralloc: add memdup", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "d964f57a48994f3f737ac1885a6dc5b8a56c7edd", + "description": "util/hash_table: add u64 foreach macro", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "cc1501628fd98bbf0f2a56d149347effb688722d", + "description": "nir: Clean up divergence analysis for TES patch input loads.", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "870a2e419758478a117685ff01a88320ce1cba49", + "description": "nir: Cleanup divergence analysis for mesh shaders.", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "9553d67373830e6e77f7c8556523f956aa4b8e32", + "description": "nir: Fix divergence analysis of load_patch_vertices_in.", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "537c0029ddece2bb0f5c56947ff7e92258077a92", + "description": "nir: Fix divergence of reductions.", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "9548cba8ab54e6256bd644f1cd177d1485ac6331", + "description": "anv,hasvk: use vk_index_to_restart", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "9da77e6c9748f4ba166181885f79c912d23af607", + "description": "tu: use vk_index_to_restart", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "a97966b840f728d6894d75ea3924b7108d9fa1f6", + "description": "vulkan: add vk_index_type_to_restart helper", + "nominated": false, + "nomination_type": 3, + "resolution": 4, + "main_sha": null, + "because_sha": null, + "notes": null + }, + { + "sha": "4d00edda00041de0492a5097353407f6d1781df3", + "description": "r300: fix memory leaks when register allocation fails", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "54f6e72b27154219be237690453bb9c3b57cd3ec", + "notes": null + }, + { + "sha": "b11ecacb9377240a81c24bc0eca3a110f9642bc3", + "description": "r300: fix r300_destroy_context() related memory leaks", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "e01f86c67b0bd955758366827cb8322aa1bec263", + "notes": null + }, { "sha": "4071c399a27932ea9253eb8a65d5725504bac6f3", "description": "radv: compute the total LDS usage in gfx10_get_ngg_info()", From e94f1fc304e74fbcd9e8354b6f59cf43b4563c91 Mon Sep 17 00:00:00 2001 From: Patrick Lerda Date: Fri, 23 Feb 2024 23:47:51 +0100 Subject: [PATCH 78/90] r300: fix r300_destroy_context() related memory leaks For instance, with "piglit/bin/fcc-blit-between-clears -auto -fbo"": SUMMARY: AddressSanitizer: 70512 byte(s) leaked in 497 allocation(s). Fixes: e01f86c67b0b ("r300: set PIPE_BIND_CONSTANT_BUFFER for const_uploader") Signed-off-by: Patrick Lerda Part-of: (cherry picked from commit b11ecacb9377240a81c24bc0eca3a110f9642bc3) --- .pick_status.json | 2 +- src/gallium/drivers/r300/r300_context.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index e3a634bb8d9..dee7c490725 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1694,7 +1694,7 @@ "description": "r300: fix r300_destroy_context() related memory leaks", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "e01f86c67b0bd955758366827cb8322aa1bec263", "notes": null diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index f77a6d6e97d..433f669b58a 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -93,6 +93,8 @@ static void r300_destroy_context(struct pipe_context* context) u_upload_destroy(r300->uploader); if (r300->context.stream_uploader) u_upload_destroy(r300->context.stream_uploader); + if (r300->context.const_uploader) + u_upload_destroy(r300->context.const_uploader); /* XXX: This function assumes r300->query_list was initialized */ r300_release_referenced_objects(r300); @@ -102,6 +104,7 @@ static void r300_destroy_context(struct pipe_context* context) r300->rws->ctx_destroy(r300->ctx); rc_destroy_regalloc_state(&r300->fs_regalloc_state); + rc_destroy_regalloc_state(&r300->vs_regalloc_state); /* XXX: No way to tell if this was initialized or not? */ slab_destroy_child(&r300->pool_transfers); @@ -128,6 +131,9 @@ static void r300_destroy_context(struct pipe_context* context) FREE(r300->vertex_stream_state.state); } } + + FREE(r300->stencilref_fallback); + FREE(r300); } From d6aefb583eac19a65eb7f03917d34dc9bac50933 Mon Sep 17 00:00:00 2001 From: Patrick Lerda Date: Sat, 24 Feb 2024 01:28:54 +0100 Subject: [PATCH 79/90] r300: fix memory leaks when register allocation fails For instance, this issue is triggered with "piglit/bin/ext_framebuffer_multisample-accuracy all_samples color depthstencil -auto -fbo": Direct leak of 1160 byte(s) in 1 object(s) allocated from: #0 0x7fbe8897d7ef in __interceptor_malloc (/usr/lib64/libasan.so.6+0xb17ef) #1 0x7fbe7e7abfcc in rc_constants_copy ../src/gallium/drivers/r300/compiler/radeon_code.c:47 #2 0x7fbe7e7ec902 in r3xx_compile_fragment_program ../src/gallium/drivers/r300/compiler/r3xx_fragprog.c:174 #3 0x7fbe7e7e1b22 in r300_translate_fragment_shader ../src/gallium/drivers/r300/r300_fs.c:516 #4 0x7fbe7e7e6373 in r300_pick_fragment_shader ../src/gallium/drivers/r300/r300_fs.c:591 #5 0x7fbe7e75456e in r300_create_fs_state ../src/gallium/drivers/r300/r300_state.c:1073 #6 0x7fbe7cd2ebe5 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1070 #7 0x7fbe7cd374b5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1116 #8 0x7fbe7cd38273 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:1281 #9 0x7fbe7cd38273 in st_finalize_program ../src/mesa/state_tracker/st_program.c:1345 #10 0x7fbe7d798ca8 in st_link_glsl_to_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:724 #11 0x7fbe7d798ca8 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_nir.cpp:952 #12 0x7fbe7d6790d5 in link_program ../src/mesa/main/shaderapi.c:1336 #13 0x7fbe7d6790d5 in link_program_error ../src/mesa/main/shaderapi.c:1447 ... SUMMARY: AddressSanitizer: 2528456 byte(s) leaked in 1057 allocation(s). Fixes: 54f6e72b2715 ("r300: better register allocator for vertex shaders") Signed-off-by: Patrick Lerda Part-of: (cherry picked from commit 4d00edda00041de0492a5097353407f6d1781df3) --- .pick_status.json | 2 +- src/gallium/drivers/r300/compiler/r3xx_vertprog.c | 1 + src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c | 1 + src/gallium/drivers/r300/r300_fs.c | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index dee7c490725..a27948a5eac 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1684,7 +1684,7 @@ "description": "r300: fix memory leaks when register allocation fails", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "54f6e72b27154219be237690453bb9c3b57cd3ec", "notes": null diff --git a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c index a02147a8244..00b9928164a 100644 --- a/src/gallium/drivers/r300/compiler/r3xx_vertprog.c +++ b/src/gallium/drivers/r300/compiler/r3xx_vertprog.c @@ -689,6 +689,7 @@ static void allocate_temporary_registers(struct radeon_compiler *c, void *user) if (!ra_allocate(graph)) { rc_error(c, "Ran out of hardware temporaries\n"); + ralloc_free(graph); return; } diff --git a/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c b/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c index e7cabfa9d24..5f947678453 100644 --- a/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c +++ b/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c @@ -357,6 +357,7 @@ static void do_advanced_regalloc(struct regalloc_state * s) if (!ra_allocate(graph)) { rc_error(s->C, "Ran out of hardware temporaries\n"); + ralloc_free(graph); return; } diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 5300c8bf047..6ce0eabdf92 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -525,6 +525,7 @@ static void r300_translate_fragment_shader( abort(); } + free(compiler.code->constants.Constants); rc_destroy(&compiler.Base); r300_dummy_fragment_shader(r300, shader); return; From b44886773c156a0e21109e1431405a8f687989dc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Mon, 26 Feb 2024 14:50:17 +0200 Subject: [PATCH 80/90] intel/blorp: disable use of REP16 independent of format MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Previously we were optimistic and tied this to certain format but wa description lists other formats and bspec clearly disallows the usage. Issue can be seen with different 16bpp tests, effect looks a bit like dithering pattern but it is not, it is just rep16 failing. Fixes: GTF-GL46.gtf42.GL3Tests.texture_storage.texture_storage_texture_as_framebuffer_attachment on DG2 and MTL, some 565 EGL tests on Android and internal issue on game that displays a dither like pattern on the background while it's not supposed to do that. Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10646 Cc: mesa-stable Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit 1a4f220c29b8ac9d8dbc83eb829e9780cbc1415a) --- .pick_status.json | 2 +- src/intel/blorp/blorp_clear.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index a27948a5eac..59d816471e0 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1474,7 +1474,7 @@ "description": "intel/blorp: disable use of REP16 independent of format", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/intel/blorp/blorp_clear.c b/src/intel/blorp/blorp_clear.c index 19d3949a4d9..c385baf5c02 100644 --- a/src/intel/blorp/blorp_clear.c +++ b/src/intel/blorp/blorp_clear.c @@ -605,15 +605,17 @@ blorp_clear(struct blorp_batch *batch, if (batch->blorp->isl_dev->info->ver < 6) use_simd16_replicated_data = false; - /* From the BSpec: 47719 Replicate Data: + /* From the BSpec: 47719 (TGL/DG2/MTL) Replicate Data: * * "Replicate Data Render Target Write message should not be used * on all projects TGL+." * + * Xe2 spec (57350) does not mention this restriction. + * * See 14017879046, 14017880152 for additional information. */ if (batch->blorp->isl_dev->info->ver >= 12 && - format == ISL_FORMAT_R10G10B10_FLOAT_A2_UNORM) + batch->blorp->isl_dev->info->ver < 20) use_simd16_replicated_data = false; if (compute) From f22f1117bdcb498b9e325b47df70837ecf3c024a Mon Sep 17 00:00:00 2001 From: Connor Abbott Date: Thu, 22 Feb 2024 13:58:11 +0000 Subject: [PATCH 81/90] tu: Follow pipeline compatibility rules for dynamic descriptors When we bind a descriptor set with dynamic descriptors, we can't ignore dynamic descriptors in previously-bound higher descriptor sets. For example, assume we have descriptor sets A and B, each of which has one dynamic storage buffer, and we do: CmdBindDescriptorSets(firstSet=1, descriptorSetCount=1, A) CmdBindDescriptorSets(firstSet=0, descriptorSetCount=1, B) and in the first CmdBindDescriptorSets the pipeline layout includes a descriptor set layout compatible with B in set 0. Then, following "Pipeline Layout Compatibility," set 0 is disturbed: When binding a descriptor set to set number N, a previously bound descriptor set bound with lower index M than N is disturbed if the pipeline layouts for set M and N are not compatible for set M. Otherwise, the bound descriptor set in M is not disturbed When it's disturbed, it's effectively turned into a set with 1 undefined dynamic storage buffer: When a descriptor set is disturbed by binding descriptor sets, the disturbed set is considered to contain undefined descriptors bound with the same pipeline layout as the disturbing descriptor set. This disturbed set is compatible with B, so in the second CmdBindDescriptorSets this clause doesn't apply: If, additionally, the previously bound descriptor set for set N was bound using a pipeline layout not compatible for set N, then all bindings in sets numbered greater than N are disturbed. and A remains valid to access. The code before 88db7364 worked only if the pipeline layout when binding B contained a descriptor layout compatible with A in set 1, because it used the pipeline layout's total size when allocating the internal dynamic descriptors array, but that isn't actually a requirement, so the previous code was already broken. After 88db7364 we only allocate as much space as required by the current descriptors being bound, because I misread the rules here, which made it more broken and broke 3DMark Wildlife Extreme that does something like this. In order to properly fix this we need to keep track of the maximum ever seen dynamic descriptor size, similar to what we already do for descriptor sets, and use that. We have no idea what needs to be preserved when binding a descriptor set with dynamic descriptors, so we have to be conservative. Fixes: 88db7364 ("tu: Rework dynamic offset handling") Part-of: (cherry picked from commit db0291c235592a7eecceb788ef622e3a630f98aa) --- .pick_status.json | 2 +- src/freedreno/vulkan/tu_cmd_buffer.cc | 22 +++++++++++++--------- src/freedreno/vulkan/tu_cmd_buffer.h | 2 +- 3 files changed, 15 insertions(+), 11 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 59d816471e0..218de9ed7a7 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -954,7 +954,7 @@ "description": "tu: Follow pipeline compatibility rules for dynamic descriptors", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "88db736472b6e9b18d3736a42b038e2a7836b0b4", "notes": null diff --git a/src/freedreno/vulkan/tu_cmd_buffer.cc b/src/freedreno/vulkan/tu_cmd_buffer.cc index 091c8cd29d7..35acc213795 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.cc +++ b/src/freedreno/vulkan/tu_cmd_buffer.cc @@ -2093,7 +2093,7 @@ tu_reset_cmd_buffer(struct vk_command_buffer *vk_cmd_buffer, memset(&cmd_buffer->descriptors[i].push_set, 0, sizeof(cmd_buffer->descriptors[i].push_set)); cmd_buffer->descriptors[i].push_set.base.type = VK_OBJECT_TYPE_DESCRIPTOR_SET; cmd_buffer->descriptors[i].max_sets_bound = 0; - cmd_buffer->descriptors[i].dynamic_bound = 0; + cmd_buffer->descriptors[i].max_dynamic_offset_size = 0; } u_trace_fini(&cmd_buffer->trace); @@ -2385,12 +2385,12 @@ tu6_emit_descriptor_sets(struct tu_cmd_buffer *cmd, cmd->state.desc_sets = tu_cs_draw_state(&cmd->sub_cs, &state_cs, 4 + 4 * descriptors_state->max_sets_bound + - (descriptors_state->dynamic_bound ? 6 : 0)); + (descriptors_state->max_dynamic_offset_size ? 6 : 0)); } else { cmd->state.desc_sets = tu_cs_draw_state(&cmd->sub_cs, &state_cs, 3 + 2 * descriptors_state->max_sets_bound + - (descriptors_state->dynamic_bound ? 3 : 0)); + (descriptors_state->max_dynamic_offset_size ? 3 : 0)); } cs = &state_cs; } else { @@ -2410,7 +2410,7 @@ tu6_emit_descriptor_sets(struct tu_cmd_buffer *cmd, } /* Dynamic descriptors get the reserved descriptor set. */ - if (descriptors_state->dynamic_bound) { + if (descriptors_state->max_dynamic_offset_size) { int reserved_set_idx = cmd->device->physical_device->reserved_set_idx; assert(reserved_set_idx >= 0); /* reserved set must be bound */ @@ -2561,22 +2561,26 @@ tu_CmdBindDescriptorSets(VkCommandBuffer commandBuffer, assert(dyn_idx == dynamicOffsetCount); if (dynamic_offset_offset) { + descriptors_state->max_dynamic_offset_size = + MAX2(descriptors_state->max_dynamic_offset_size, dynamic_offset_offset); + /* allocate and fill out dynamic descriptor set */ struct tu_cs_memory dynamic_desc_set; int reserved_set_idx = cmd->device->physical_device->reserved_set_idx; - VkResult result = tu_cs_alloc(&cmd->sub_cs, - dynamic_offset_offset / (4 * A6XX_TEX_CONST_DWORDS), - A6XX_TEX_CONST_DWORDS, &dynamic_desc_set); + VkResult result = + tu_cs_alloc(&cmd->sub_cs, + descriptors_state->max_dynamic_offset_size / + (4 * A6XX_TEX_CONST_DWORDS), + A6XX_TEX_CONST_DWORDS, &dynamic_desc_set); if (result != VK_SUCCESS) { vk_command_buffer_set_error(&cmd->vk, result); return; } memcpy(dynamic_desc_set.map, descriptors_state->dynamic_descriptors, - dynamic_offset_offset); + descriptors_state->max_dynamic_offset_size); assert(reserved_set_idx >= 0); /* reserved set must be bound */ descriptors_state->set_iova[reserved_set_idx] = dynamic_desc_set.iova | BINDLESS_DESCRIPTOR_64B; - descriptors_state->dynamic_bound = true; } tu_dirty_desc_sets(cmd, pipelineBindPoint); diff --git a/src/freedreno/vulkan/tu_cmd_buffer.h b/src/freedreno/vulkan/tu_cmd_buffer.h index 7538ad3a71c..448323a04a9 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.h +++ b/src/freedreno/vulkan/tu_cmd_buffer.h @@ -54,7 +54,7 @@ struct tu_descriptor_state uint32_t dynamic_descriptors[MAX_DYNAMIC_BUFFERS_SIZE]; uint64_t set_iova[MAX_SETS]; uint32_t max_sets_bound; - bool dynamic_bound; + uint32_t max_dynamic_offset_size; }; enum tu_cmd_dirty_bits From dd627a3462b8243adbc15fb58aa05ab1c4d5dea9 Mon Sep 17 00:00:00 2001 From: Sagar Ghuge Date: Sun, 5 Mar 2023 15:33:19 -0800 Subject: [PATCH 82/90] nir: Allow nir_texop_tg4 in implicit derivative This allow us to invoke the quad helper. v2: (Georg) - Add check for is_gather_implicit_lod Fixes: 48158636bf1b ("nir: add is_gather_implicit_lod") Reviewed-by: Ian Romanick Signed-off-by: Sagar Ghuge Part-of: (cherry picked from commit 30ead72e80e5b7ba5c5dfc46261b4d249f4fa382) --- .pick_status.json | 2 +- src/compiler/nir/nir.c | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 218de9ed7a7..fa2a67576c2 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -874,7 +874,7 @@ "description": "nir: Allow nir_texop_tg4 in implicit derivative", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "48158636bf1b0e62ebab4835e1f474866a34c6fe", "notes": null diff --git a/src/compiler/nir/nir.c b/src/compiler/nir/nir.c index 70d5a8a2279..00981d4a1c4 100644 --- a/src/compiler/nir/nir.c +++ b/src/compiler/nir/nir.c @@ -3133,6 +3133,8 @@ nir_tex_instr_has_implicit_derivative(const nir_tex_instr *instr) case nir_texop_txb: case nir_texop_lod: return true; + case nir_texop_tg4: + return instr->is_gather_implicit_lod; default: return false; } From 6157ac47f5c7534e67eb6015834a8e2b621bcb84 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 22 Feb 2024 18:19:33 +0200 Subject: [PATCH 83/90] iris: make sure DS and TE are sent in pairs on >= gfx125 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We have couple of dynamic fields used on >= gfx125, ScratchSpaceBuffer and TessellationDistributionMode. There are also 2 workarounds dealing with TessellationDistributionMode. These changes make sure that we always emit both DS and TE together when the dynamic fields need to be changed. This fixes KHR-Single-GL46.arrays_of_arrays_gl.AtomicUsage on MTL. Cc: mesa-stable Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10636 Signed-off-by: Tapani Pälli Reviewed-by: José Roberto de Souza Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit 1b1afd7b2412b142d140d482e0517aaf1778658f) --- .pick_status.json | 2 +- src/gallium/drivers/iris/iris_state.c | 17 ++++++++++------- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index fa2a67576c2..efdd5849fbd 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -734,7 +734,7 @@ "description": "iris: make sure DS and TE are sent in pairs on >= gfx125", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 51bf69debef..8edc492b46f 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -7135,7 +7135,12 @@ iris_upload_dirty_render_state(struct iris_context *ice, } } +#if GFX_VERx10 >= 125 + /* This is only used on >= gfx125 for dynamic 3DSTATE_TE emission + * related workarounds. + */ bool program_needs_wa_14015055625 = false; +#endif #if INTEL_WA_14015055625_GFX_VER /* Check if FS stage will use primitive ID overrides for Wa_14015055625. */ @@ -7239,16 +7244,14 @@ iris_upload_dirty_render_state(struct iris_context *ice, GENX(3DSTATE_PS_length)); iris_emit_merge(batch, shader_psx, psx_state, GENX(3DSTATE_PS_EXTRA_length)); - } else if (stage == MESA_SHADER_TESS_EVAL && - intel_needs_workaround(batch->screen->devinfo, 14015055625) && - !program_needs_wa_14015055625) { - /* This program doesn't require Wa_14015055625, so we can enable - * a Tessellation Distribution Mode. - */ #if GFX_VERx10 >= 125 + } else if (stage == MESA_SHADER_TESS_EVAL) { uint32_t te_state[GENX(3DSTATE_TE_length)] = { 0 }; iris_pack_command(GENX(3DSTATE_TE), te_state, te) { - if (intel_needs_workaround(batch->screen->devinfo, 22012699309)) + if (intel_needs_workaround(screen->devinfo, 14015055625) && + program_needs_wa_14015055625) + te.TessellationDistributionMode = TEDMODE_OFF; + else if (intel_needs_workaround(screen->devinfo, 22012699309)) te.TessellationDistributionMode = TEDMODE_RR_STRICT; else te.TessellationDistributionMode = TEDMODE_RR_FREE; From e7244292ce732f88858c9c3b26c2c32eb3c63f26 Mon Sep 17 00:00:00 2001 From: David Rosca Date: Tue, 27 Feb 2024 10:41:49 +0100 Subject: [PATCH 84/90] frontends/va: Only set VP9 segmentation fields when segmentation is enabled Workaround for ffmpeg setting segmentation_update_map to 1 with segmentation_enabled == 0. Fixes decoding sample from https://github.com/mpv-player/mpv/issues/13533 Cc: mesa-stable Reviewed-by: Leo Liu Part-of: (cherry picked from commit 82ff9204abab5267f82a9ce73f9dca1541ef5ee6) --- .pick_status.json | 2 +- src/gallium/frontends/va/picture_vp9.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index efdd5849fbd..7cd88c93b22 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -4,7 +4,7 @@ "description": "frontends/va: Only set VP9 segmentation fields when segmentation is enabled", "nominated": true, "nomination_type": 0, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/gallium/frontends/va/picture_vp9.c b/src/gallium/frontends/va/picture_vp9.c index ff3da929f0b..f08b019fac1 100644 --- a/src/gallium/frontends/va/picture_vp9.c +++ b/src/gallium/frontends/va/picture_vp9.c @@ -56,8 +56,10 @@ void vlVaHandlePictureParameterBufferVP9(vlVaDriver *drv, vlVaContext *context, context->desc.vp9.picture_parameter.pic_fields.refresh_frame_context = vp9->pic_fields.bits.refresh_frame_context; context->desc.vp9.picture_parameter.pic_fields.frame_context_idx = vp9->pic_fields.bits.frame_context_idx; context->desc.vp9.picture_parameter.pic_fields.segmentation_enabled = vp9->pic_fields.bits.segmentation_enabled; - context->desc.vp9.picture_parameter.pic_fields.segmentation_temporal_update = vp9->pic_fields.bits.segmentation_temporal_update; - context->desc.vp9.picture_parameter.pic_fields.segmentation_update_map = vp9->pic_fields.bits.segmentation_update_map; + context->desc.vp9.picture_parameter.pic_fields.segmentation_temporal_update = + vp9->pic_fields.bits.segmentation_enabled && vp9->pic_fields.bits.segmentation_temporal_update; + context->desc.vp9.picture_parameter.pic_fields.segmentation_update_map = + vp9->pic_fields.bits.segmentation_enabled && vp9->pic_fields.bits.segmentation_update_map; context->desc.vp9.picture_parameter.pic_fields.last_ref_frame = vp9->pic_fields.bits.last_ref_frame; context->desc.vp9.picture_parameter.pic_fields.last_ref_frame_sign_bias = vp9->pic_fields.bits.last_ref_frame_sign_bias; context->desc.vp9.picture_parameter.pic_fields.golden_ref_frame = vp9->pic_fields.bits.golden_ref_frame; From b067a61c07839928f3812fc90a14df80cb59efc3 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Thu, 11 Jan 2024 13:14:47 -0800 Subject: [PATCH 85/90] nir: Mark nir_intrinsic_load_global_block_intel as divergent This is divergent because it specifically loads sequential values into successive SIMD lanes. No shader-db or fossil-db changes on any Intel platform. Fixes: 9f44a264623 ("nir/divergence: handle load_global_block_intel") Reviewed-by: Lionel Landwerlin Part-of: (cherry picked from commit 75de4458a1350ac6f3843e4f8da7a69717c92687) --- .pick_status.json | 2 +- src/compiler/nir/nir_divergence_analysis.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 7cd88c93b22..aad39c6da1f 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -124,7 +124,7 @@ "description": "nir: Mark nir_intrinsic_load_global_block_intel as divergent", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "9f44a264623461c98368185b023d99446676e039", "notes": null diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c index 4cb456bc747..7aa49801ced 100644 --- a/src/compiler/nir/nir_divergence_analysis.c +++ b/src/compiler/nir/nir_divergence_analysis.c @@ -189,7 +189,6 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) case nir_intrinsic_load_resume_shader_address_amd: case nir_intrinsic_load_global_const_block_intel: case nir_intrinsic_load_reloc_const_intel: - case nir_intrinsic_load_global_block_intel: case nir_intrinsic_load_btd_global_arg_addr_intel: case nir_intrinsic_load_btd_local_arg_addr_intel: case nir_intrinsic_load_mesh_inline_data_intel: @@ -219,6 +218,13 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr) is_divergent = false; break; + /* This is divergent because it specifically loads sequential values into + * successive SIMD lanes. + */ + case nir_intrinsic_load_global_block_intel: + is_divergent = true; + break; + case nir_intrinsic_decl_reg: is_divergent = nir_intrinsic_divergent(instr); break; From b137afc1e6d444603bdacb74fb982818c05628e7 Mon Sep 17 00:00:00 2001 From: Daniel Stone Date: Fri, 23 Feb 2024 11:44:09 +0000 Subject: [PATCH 86/90] egl/wayland: Add opaque-equivalent FourCCs Add a mapping for the opaque version of an alphaful format (e.g. ARGB8888 -> XRGB8888) to better support EGL_EXT_present_opaque. Part-of: (cherry picked from commit c74f4803911d8cbc9e9617ed79ea9480f335addd) --- .pick_status.json | 2 +- src/egl/drivers/dri2/platform_wayland.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index aad39c6da1f..64482bf2177 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -484,7 +484,7 @@ "description": "egl/wayland: Add opaque-equivalent FourCCs", "nominated": false, "nomination_type": 3, - "resolution": 4, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c index 4105c2bfe4d..d243b6f1e5d 100644 --- a/src/egl/drivers/dri2/platform_wayland.c +++ b/src/egl/drivers/dri2/platform_wayland.c @@ -73,6 +73,7 @@ static const struct dri2_wl_visual { */ int alt_dri_image_format; int bpp; + int opaque_wl_drm_format; int rgba_shifts[4]; unsigned int rgba_sizes[4]; } dri2_wl_visuals[] = { @@ -83,6 +84,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ABGR16161616F, 0, 64, + WL_DRM_FORMAT_XBGR16F, {0, 16, 32, 48}, {16, 16, 16, 16}, }, @@ -93,6 +95,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XBGR16161616F, 0, 64, + WL_DRM_FORMAT_XBGR16F, {0, 16, 32, -1}, {16, 16, 16, 0}, }, @@ -103,6 +106,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XRGB2101010, __DRI_IMAGE_FORMAT_XBGR2101010, 32, + WL_DRM_FORMAT_XRGB2101010, {20, 10, 0, -1}, {10, 10, 10, 0}, }, @@ -113,6 +117,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ARGB2101010, __DRI_IMAGE_FORMAT_ABGR2101010, 32, + WL_DRM_FORMAT_XRGB2101010, {20, 10, 0, 30}, {10, 10, 10, 2}, }, @@ -123,6 +128,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XBGR2101010, __DRI_IMAGE_FORMAT_XRGB2101010, 32, + WL_DRM_FORMAT_XBGR2101010, {0, 10, 20, -1}, {10, 10, 10, 0}, }, @@ -133,6 +139,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ABGR2101010, __DRI_IMAGE_FORMAT_ARGB2101010, 32, + WL_DRM_FORMAT_XBGR2101010, {0, 10, 20, 30}, {10, 10, 10, 2}, }, @@ -143,6 +150,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XRGB8888, __DRI_IMAGE_FORMAT_NONE, 32, + WL_DRM_FORMAT_XRGB8888, {16, 8, 0, -1}, {8, 8, 8, 0}, }, @@ -153,6 +161,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ARGB8888, __DRI_IMAGE_FORMAT_NONE, 32, + WL_DRM_FORMAT_XRGB8888, {16, 8, 0, 24}, {8, 8, 8, 8}, }, @@ -163,6 +172,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ABGR8888, __DRI_IMAGE_FORMAT_NONE, 32, + WL_DRM_FORMAT_XBGR8888, {0, 8, 16, 24}, {8, 8, 8, 8}, }, @@ -173,6 +183,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XBGR8888, __DRI_IMAGE_FORMAT_NONE, 32, + WL_DRM_FORMAT_XBGR8888, {0, 8, 16, -1}, {8, 8, 8, 0}, }, @@ -183,6 +194,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_RGB565, __DRI_IMAGE_FORMAT_NONE, 16, + WL_DRM_FORMAT_RGB565, {11, 5, 0, -1}, {5, 6, 5, 0}, }, @@ -193,6 +205,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ARGB1555, __DRI_IMAGE_FORMAT_ABGR1555, 16, + WL_DRM_FORMAT_XRGB1555, {10, 5, 0, 15}, {5, 5, 5, 1}, }, @@ -203,6 +216,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XRGB1555, __DRI_IMAGE_FORMAT_XBGR1555, 16, + WL_DRM_FORMAT_XRGB1555, {10, 5, 0, -1}, {5, 5, 5, 0}, }, @@ -213,6 +227,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_ARGB4444, __DRI_IMAGE_FORMAT_XBGR4444, 16, + WL_DRM_FORMAT_XRGB4444, {8, 4, 0, 12}, {4, 4, 4, 4}, }, @@ -223,6 +238,7 @@ static const struct dri2_wl_visual { __DRI_IMAGE_FORMAT_XRGB4444, __DRI_IMAGE_FORMAT_XBGR4444, 16, + WL_DRM_FORMAT_XRGB4444, {8, 4, 0, -1}, {4, 4, 4, 0}, }, From 7e6f55f336b68dab71185253de4d1e4c22f9ef4a Mon Sep 17 00:00:00 2001 From: Daniel Stone Date: Fri, 23 Feb 2024 11:45:15 +0000 Subject: [PATCH 87/90] egl/wayland: Fix EGL_EXT_present_opaque This extension has been broken ever since the initial commit. It created an XRGB DRIImage for the driver to render to, so whilst the presentation was opaque, the buffer also completely lacked an alpha channel. Fix it by making sure we only modify the FourCC we send to the Wayland server when creating a buffer. Closes: mesa/mesa#5886 Fixes: 9aee7855d2dd ("egl: implement EGL_EXT_present_opaque on wayland") Part-of: (cherry picked from commit 9ea9a963aa142910ed3a0fcea9060d3a92ee5ab7) --- .pick_status.json | 2 +- src/egl/drivers/dri2/platform_wayland.c | 61 ++++++------------------- 2 files changed, 15 insertions(+), 48 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 64482bf2177..66ab91119f3 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -474,7 +474,7 @@ "description": "egl/wayland: Fix EGL_EXT_present_opaque", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "9aee7855d2ddf47169270d5d1e3e92ff6e5f65c2", "notes": null diff --git a/src/egl/drivers/dri2/platform_wayland.c b/src/egl/drivers/dri2/platform_wayland.c index d243b6f1e5d..00d53e9b3fe 100644 --- a/src/egl/drivers/dri2/platform_wayland.c +++ b/src/egl/drivers/dri2/platform_wayland.c @@ -246,7 +246,7 @@ static const struct dri2_wl_visual { static int dri2_wl_visual_idx_from_config(struct dri2_egl_display *dri2_dpy, - const __DRIconfig *config, bool force_opaque) + const __DRIconfig *config) { int shifts[4]; unsigned int sizes[4]; @@ -256,16 +256,13 @@ dri2_wl_visual_idx_from_config(struct dri2_egl_display *dri2_dpy, for (unsigned int i = 0; i < ARRAY_SIZE(dri2_wl_visuals); i++) { const struct dri2_wl_visual *wl_visual = &dri2_wl_visuals[i]; - int cmp_rgb_shifts = - memcmp(shifts, wl_visual->rgba_shifts, 3 * sizeof(shifts[0])); - int cmp_rgb_sizes = - memcmp(sizes, wl_visual->rgba_sizes, 3 * sizeof(sizes[0])); + int cmp_rgba_shifts = + memcmp(shifts, wl_visual->rgba_shifts, 4 * sizeof(shifts[0])); + int cmp_rgba_sizes = + memcmp(sizes, wl_visual->rgba_sizes, 4 * sizeof(sizes[0])); - if (cmp_rgb_shifts == 0 && cmp_rgb_sizes == 0 && - wl_visual->rgba_shifts[3] == (force_opaque ? -1 : shifts[3]) && - wl_visual->rgba_sizes[3] == (force_opaque ? 0 : sizes[3])) { + if (cmp_rgba_shifts == 0 && cmp_rgba_sizes == 0) return i; - } } return -1; @@ -318,7 +315,7 @@ dri2_wl_is_format_supported(void *user_data, uint32_t format) for (int i = 0; dri2_dpy->driver_configs[i]; i++) if (j == dri2_wl_visual_idx_from_config( - dri2_dpy, dri2_dpy->driver_configs[i], false)) + dri2_dpy, dri2_dpy->driver_configs[i])) return true; return false; @@ -726,43 +723,10 @@ dri2_wl_create_window_surface(_EGLDisplay *disp, _EGLConfig *conf, dri2_surf->base.Width = window->width; dri2_surf->base.Height = window->height; -#ifndef NDEBUG - /* Enforce that every visual has an opaque variant (requirement to support - * EGL_EXT_present_opaque) - */ - for (unsigned int i = 0; i < ARRAY_SIZE(dri2_wl_visuals); i++) { - const struct dri2_wl_visual *transparent_visual = &dri2_wl_visuals[i]; - if (transparent_visual->rgba_sizes[3] == 0) { - continue; - } - - bool found_opaque_equivalent = false; - for (unsigned int j = 0; j < ARRAY_SIZE(dri2_wl_visuals); j++) { - const struct dri2_wl_visual *opaque_visual = &dri2_wl_visuals[j]; - if (opaque_visual->rgba_sizes[3] != 0) { - continue; - } - - int cmp_rgb_shifts = - memcmp(transparent_visual->rgba_shifts, opaque_visual->rgba_shifts, - 3 * sizeof(opaque_visual->rgba_shifts[0])); - int cmp_rgb_sizes = - memcmp(transparent_visual->rgba_sizes, opaque_visual->rgba_sizes, - 3 * sizeof(opaque_visual->rgba_sizes[0])); - - if (cmp_rgb_shifts == 0 && cmp_rgb_sizes == 0) { - found_opaque_equivalent = true; - break; - } - } - - assert(found_opaque_equivalent); - } -#endif - - visual_idx = dri2_wl_visual_idx_from_config(dri2_dpy, config, - dri2_surf->base.PresentOpaque); + visual_idx = dri2_wl_visual_idx_from_config(dri2_dpy, config); assert(visual_idx != -1); + assert(dri2_wl_visuals[visual_idx].dri_image_format != + __DRI_IMAGE_FORMAT_NONE); if (dri2_dpy->wl_dmabuf || dri2_dpy->wl_drm) { dri2_surf->format = dri2_wl_visuals[visual_idx].wl_drm_format; @@ -1517,6 +1481,9 @@ create_wl_buffer(struct dri2_egl_display *dri2_dpy, close(fd); } + if (dri2_surf && dri2_surf->base.PresentOpaque) + fourcc = dri2_wl_visuals[visual_idx].opaque_wl_drm_format; + ret = zwp_linux_buffer_params_v1_create_immed(params, width, height, fourcc, 0); zwp_linux_buffer_params_v1_destroy(params); @@ -2100,7 +2067,7 @@ dri2_wl_add_configs_for_visuals(_EGLDisplay *disp) /* No match for config. Try if we can blitImage convert to a visual */ c = dri2_wl_visual_idx_from_config(dri2_dpy, - dri2_dpy->driver_configs[i], false); + dri2_dpy->driver_configs[i]); if (c == -1) continue; From 8a5c89a29477c6e77cd114c860b19d5b3eeb7a48 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 28 Feb 2024 13:29:30 +0000 Subject: [PATCH 88/90] [24.0 only] disable clang-format It's been disabled on main which means I'm now getting backports that do not pass this check anymore. --- .gitlab-ci/test/gitlab-ci.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.gitlab-ci/test/gitlab-ci.yml b/.gitlab-ci/test/gitlab-ci.yml index 87d379b26bc..629a1766e01 100644 --- a/.gitlab-ci/test/gitlab-ci.yml +++ b/.gitlab-ci/test/gitlab-ci.yml @@ -43,7 +43,7 @@ rustfmt: - rustfmt --verbose src/**/lib.rs - rustfmt --verbose src/**/main.rs -clang-format: +.clang-format: extends: - .formatting-check - .lint-clang-format-rules From 11367cc87a816ede7c4bf235da2091067a844130 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 28 Feb 2024 18:29:07 +0000 Subject: [PATCH 89/90] docs: add release notes for 24.0.2 --- docs/relnotes.rst | 2 + docs/relnotes/24.0.2.rst | 230 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 232 insertions(+) create mode 100644 docs/relnotes/24.0.2.rst diff --git a/docs/relnotes.rst b/docs/relnotes.rst index 40164bf1d42..20f4672ab90 100644 --- a/docs/relnotes.rst +++ b/docs/relnotes.rst @@ -3,6 +3,7 @@ Release Notes The release notes summarize what's new or changed in each Mesa release. +- :doc:`24.0.2 release notes ` - :doc:`24.0.1 release notes ` - :doc:`24.0.0 release notes ` - :doc:`23.3.3 release notes ` @@ -409,6 +410,7 @@ The release notes summarize what's new or changed in each Mesa release. :maxdepth: 1 :hidden: + 24.0.2 24.0.1 24.0.0 23.3.3 diff --git a/docs/relnotes/24.0.2.rst b/docs/relnotes/24.0.2.rst new file mode 100644 index 00000000000..b3d4d74ae38 --- /dev/null +++ b/docs/relnotes/24.0.2.rst @@ -0,0 +1,230 @@ +Mesa 24.0.2 Release Notes / 2024-02-28 +====================================== + +Mesa 24.0.2 is a bug fix release which fixes bugs found since the 24.0.1 release. + +Mesa 24.0.2 implements the OpenGL 4.6 API, but the version reported by +glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) / +glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used. +Some drivers don't support all the features required in OpenGL 4.6. OpenGL +4.6 is **only** available if requested at context creation. +Compatibility contexts may report a lower version depending on each driver. + +Mesa 24.0.2 implements the Vulkan 1.3 API, but the version reported by +the apiVersion property of the VkPhysicalDeviceProperties struct +depends on the particular driver being used. + +SHA256 checksum +--------------- + +:: + + TBD. + + +New features +------------ + +- None + + +Bug fixes +--------- + +- KHR-Single-GL46.arrays_of_arrays_gl.AtomicUsage fails on MTL +- GTF-GL46.gtf42.GL3Tests.texture_storage.texture_storage_texture_as_framebuffer_attachment fails on MTL +- [intel][anv][build][regression] - genX_grl.h:27:10: fatal error: grl/grl_cl_kernel.h: No such file or directory +- RX 6600 VDPAU not recognizing HEVC_MAIN_10 correctly +- Running an app on another AMD GPU (offload, DRI_PRIME) produces corrupted frames on Wayland. +- VDPAU declares a texture as "immutable" without also setting its ImmutableLevels attribute. +- RX6600 hardware HEVC video decode fails for VDPAU but works for VA-API. (Can lock up GPU!) +- Rusticl panics when getting program build logs using opencl.hpp +- ue5 game issues lighting Rog Ally 7080u (z1e) +- Missing textures in RoboCop: Rogue City with mesh shaders enabled +- radv: Multiview PSO forgets to export layer in some cases. +- zink: flickering artifacts in Selaco + + +Changes +------- + +Boyuan Zhang (1): + +- radeonsi/vcn: only use multi slices reflist when available + +Chia-I Wu (1): + +- radv: fix pipeline stats mask + +Chris Rankin (2): + +- vdpau: Declare texture object as immutable using helper function. +- vdpau: Refactor query for video surface formats. + +Connor Abbott (1): + +- tu: Follow pipeline compatibility rules for dynamic descriptors + +Daniel Schürmann (1): + +- spirv: Fix SpvOpExpectKHR + +Daniel Stone (2): + +- egl/wayland: Add opaque-equivalent FourCCs +- egl/wayland: Fix EGL_EXT_present_opaque + +Dave Airlie (2): + +- nouveau/winsys: fix bda heap leak. +- nvk: fix dri options leak. + +David Rosca (1): + +- frontends/va: Only set VP9 segmentation fields when segmentation is enabled + +Eric Engestrom (10): + +- docs: add sha256sum for 24.0.1 +- [24.0-only change] ci: increase the kernel+rootfs builds timeout to 2h +- .pick_status.json: Update to c6e855b64b9015235462959b2b7f3e9fc34b2f1f +- .pick_status.json: Update to dce20690542c84ac00509a6db7902dcfc90b25bb +- .pick_status.json: Update to c12300844d3f084ca011a3f54f0cbaa9807418f0 +- .pick_status.json: Mark 3b927567ac927316eb11901f50ee1573ead44fd2 as denominated +- .pick_status.json: Update to 423add61e2d5b6ab6b5505d1feec01b93609f8fc +- .pick_status.json: Update to 4071c399a27932ea9253eb8a65d5725504bac6f3 +- .pick_status.json: Update to 82ff9204abab5267f82a9ce73f9dca1541ef5ee6 +- [24.0 only] disable clang-format + +Erik Faye-Lund (1): + +- mesa/main: allow GL_BGRA for FBOs + +Faith Ekstrand (1): + +- nvk: Invalidate the texture cache before MSAA resolves + +Hans-Kristian Arntzen (1): + +- radv: export multiview in VS/TES/GS for depth-only rendering + +Iago Toral Quiroga (1): + +- v3d,v3dv: fix BO allocation for shared vars + +Ian Romanick (1): + +- nir: Mark nir_intrinsic_load_global_block_intel as divergent + +Jesse Natalie (1): + +- dzn: Don't set view instancing mask until after the PSO + +Jordan Justen (1): + +- intel/dev: Add 2 additional ADL-N PCI ids + +Juston Li (1): + +- venus: fix image reqs cache store locking + +Karol Herbst (3): + +- zink: lower unaligned memory accesses +- rusticl/program: fix CL_PROGRAM_BINARIES for devs with no builds +- meson: do not pull in clc for clover + +Konstantin Seurer (5): + +- zink: Always set mfence->submit_count to the fence submit_count +- Revert "zink: always force flushes when originating from api frontend" +- llvmpipe: Use full subgroups when possible +- gallivm: Consider the initial mask when terminating loops +- ci: Update llvmpipe trace checksums + +Lionel Landwerlin (8): + +- vulkan/runtime: add helper to query attachment layout +- anv: fixup push descriptor shader analysis +- anv: reenable ANV_ALWAYS_BINDLESS +- anv: fix Wa_16013994831 macros +- anv: disable Wa_16013994831 +- intel/nir: only consider ray query variables in lowering +- anv: limit depth flush on dynamic render pass suspend +- anv: add missing generated file dep + +Martin Roukala (né Peres) (1): + +- radv/ci: switch vkcts-polaris10 from mupuf to KWS' farm + +Michel Dänzer (1): + +- egl/wayland: Flush after blitting to linear copy + +Mike Blumenkrantz (25): + +- zink: prune dmabuf export tracking when adding resource binds +- zink: fix sparse bo placement +- zink: zero allocate resident_defs array in ntv +- zink: move sparse lowering up in file +- zink: run sparse lowering after all optimization passes +- zink: adjust swizzled deref loads by the variable component offset +- zink: clamp zink_gfx_lib_cache::stages_present for generated tcs +- zink: promote gpl libs freeing during shader destroy out of prog loop +- zink: don't add VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT for sparse textures +- zink: delete maxDescriptorBufferBindings checks +- zink: avoid infinite recursion on (very) small BAR systems in bo alloc +- zink: add checks/compat for low-spec descriptor buffer implementations +- zink: add a second fence disambiguation case +- zink: force host-visible allocations for MAP_COHERENT resources +- zink: handle stencil_fallback in zink_clear_depth_stencil +- zink: don't destroy the current batch state on context destroy +- mesa: check driver format support for certain GetInternalformativ queries +- vk/wsi/x11/sw: use swapchain depth for putimage +- zink: only scan active batch states for free states if > 1 exist +- zink: fix longstanding issue with active batch state recycling +- zink: assert that batch_id is valid in zink_screen_check_last_finished() +- zink: clamp in_rp clears to fb size +- zink: fix (dynamic rendering) execution of scissored clears during flush +- zink: lock buffer age when chundering swapchain for readback +- zink: flag acquired swapchain image as readback target on acquire, not present + +Patrick Lerda (3): + +- r300: fix vertex_buffer related refcnt imbalance +- r300: fix r300_destroy_context() related memory leaks +- r300: fix memory leaks when register allocation fails + +Pavel Ondračka (1): + +- r300: add explicit flrp lowering + +Rhys Perry (2): + +- aco/ra: don't initialize assigned in initializer list +- aco/ra: fix GFX9- writelane + +Sagar Ghuge (1): + +- nir: Allow nir_texop_tg4 in implicit derivative + +Samuel Pitoiset (4): + +- radv: fix RGP barrier reason for RP barriers inserted by the runtime +- radv: enable GS_FAST_LAUNCH=2 by default for RDNA3 APUs (Phoenix) +- spirv: only consider IO variables when adjusting patch locations for TES +- radv: fix indirect dispatches on compute queue with conditional rendering on GFX7 + +Tapani Pälli (2): + +- intel/blorp: disable use of REP16 independent of format +- iris: make sure DS and TE are sent in pairs on >= gfx125 + +Yiwei Zhang (2): + +- venus: force async pipeline create on threads creating descriptor pools +- venus: fix the cmd stride used for qfb recording + +thfrwn (1): + +- mesa: fix off-by-one for newblock allocation in dlist_alloc From a3df5eab6c38682fd6ece3f9420d696eab9479f5 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Wed, 28 Feb 2024 18:29:18 +0000 Subject: [PATCH 90/90] VERSION: bump for 24.0.2 --- VERSION | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/VERSION b/VERSION index 1b3e74f84e7..a19540167eb 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -24.0.1 +24.0.2