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i965: Support accelerated blit for depth 30 formats. (v2)

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Extend intel_miptree_blit() to handle at least
ARGB2101010 -> XRGB2101010, ARGB2101010 -> ARGB2101010,
and XRGB2101010 -> XRGB2101010 via the BLT engine,
but not XRGB2101010 -> ARGB2101010 yet.

This works as tested under Compiz, KDE-5, Gnome-Shell.

v2: Restrict BLT fast path to exclude XRGB2101010 -> ARGB2101010,
    as intel_miptree_set_alpha_to_one() isn't ready to set 2 bit
    alpha channels to 1.0 yet. However, couldn't find a test case
    where this specific blit would be needed, so maybe not much
    of a point to improve here.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Mario Kleiner 2017-12-15 23:04:49 +01:00 • committed by Marek Olšák
parent 6945f313c4
commit 26c4d804ff
1 changed files with 19 additions and 1 deletions
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20
src/mesa/drivers/dri/i965/intel_blit.c
View file

@ -170,6 +170,19 @@ intel_miptree_blit_compatible_formats(mesa_format src, mesa_format dst)
return (dst == MESA_FORMAT_R8G8B8A8_UNORM ||
dst == MESA_FORMAT_R8G8B8X8_UNORM);
/* We can also discard alpha when going from A2->X2 for 2 bit alpha,
* however we can't fill the alpha channel with two 1 bits when going
* from X2->A2, because intel_miptree_set_alpha_to_one() is not yet
* ready for this / can only handle 8 bit alpha.
*/
if (src == MESA_FORMAT_B10G10R10A2_UNORM)
return (dst == MESA_FORMAT_B10G10R10A2_UNORM ||
dst == MESA_FORMAT_B10G10R10X2_UNORM);
if (src == MESA_FORMAT_R10G10B10A2_UNORM)
return (dst == MESA_FORMAT_R10G10B10A2_UNORM ||
dst == MESA_FORMAT_R10G10B10X2_UNORM);
return false;
}
@ -322,7 +335,8 @@ intel_miptree_blit(struct brw_context *brw,
/* The blitter doesn't support doing any format conversions. We do also
* support blitting ARGB8888 to XRGB8888 (trivial, the values dropped into
* the X channel don't matter), and XRGB8888 to ARGB8888 by setting the A
* channel to 1.0 at the end.
* channel to 1.0 at the end. Also trivially ARGB2101010 to XRGB2101010,
* but not XRGB2101010 to ARGB2101010 yet.
*/
if (!intel_miptree_blit_compatible_formats(src_format, dst_format)) {
perf_debug("%s: Can't use hardware blitter from %s to %s, "
@ -789,6 +803,10 @@ intel_miptree_set_alpha_to_one(struct brw_context *brw,
DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
__func__, mt->bo, pitch, x, y, width, height);
/* Note: Currently only handles 8 bit alpha channel. Extension to < 8 Bit
* alpha channel would be likely possible via ROP code 0xfa instead of 0xf0
* and writing a suitable bit-mask instead of 0xffffffff.
*/
BR13 = br13_for_cpp(cpp) | 0xf0 << 16;
CMD = XY_COLOR_BLT_CMD;
CMD |= XY_BLT_WRITE_ALPHA;