diff --git a/src/asahi/lib/agx_tilebuffer.c b/src/asahi/lib/agx_tilebuffer.c
index 11dca587ae7..34a55e659b8 100644
--- a/src/asahi/lib/agx_tilebuffer.c
+++ b/src/asahi/lib/agx_tilebuffer.c
@@ -91,9 +91,9 @@ agx_build_tilebuffer_layout(enum pipe_format *formats, uint8_t nr_cbufs,
        * TODO: Suboptimal, we might be able to reorder render targets to
        * avoid fragmentation causing spilling.
        */
-      bool fits =
-         (new_offset_B <= MAX_BYTES_PER_SAMPLE) &&
-         (new_offset_B * MIN_TILE_SIZE_PX * nr_samples) <= MAX_BYTES_PER_TILE;
+      bool fits = (new_offset_B <= MAX_BYTES_PER_SAMPLE) &&
+                  (ALIGN_POT(new_offset_B, 8) * MIN_TILE_SIZE_PX *
+                   nr_samples) <= MAX_BYTES_PER_TILE;
 
       if (fits) {
          tib._offset_B[rt] = offset_B;
diff --git a/src/asahi/lib/tests/test-tilebuffer.cpp b/src/asahi/lib/tests/test-tilebuffer.cpp
index 81b8db162c4..905db02215b 100644
--- a/src/asahi/lib/tests/test-tilebuffer.cpp
+++ b/src/asahi/lib/tests/test-tilebuffer.cpp
@@ -128,7 +128,30 @@ struct test tests[] = {
          .tile_size = { 32, 32 },
       },
       8192
-   }
+   },
+   {
+      "MRT test that requires spilling to consider alignment requirements",
+      4,
+      {
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+         PIPE_FORMAT_R32_FLOAT,
+      },
+      {
+         .spilled = { false, false, false, false, false, false, true, true },
+         ._offset_B = { 0, 4, 8, 12, 16, 20, 0, 0},
+         .sample_size_B = 24,
+         .nr_samples = 4,
+         .tile_size = { 16, 16 },
+      },
+      24576
+   },
+
 };
 /* clang-format on */