tu, ir3: Move multi_pos_output to ir3_shader_variant

This means it has to be rederived rather than passed from the place
where we actually do the optimization, but it eliminates the clutter of
having to pass it around in turnip, which will only get worse with
graphics pipeline libraries.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18554>
This commit is contained in:
Connor Abbott 2022-08-22 20:59:52 +02:00 committed by Marge Bot
parent fa1925256e
commit 3fa0c55a08
7 changed files with 10 additions and 17 deletions

View file

@ -4130,6 +4130,9 @@ setup_output(struct ir3_context *ctx, nir_intrinsic_instr *intr)
*/
unsigned slot = io.location + (io.per_view ? 0 : offset);
if (io.per_view && offset > 0)
so->multi_pos_output = true;
if (ctx->so->type == MESA_SHADER_FRAGMENT) {
switch (slot) {
case FRAG_RESULT_DEPTH:

View file

@ -568,6 +568,9 @@ struct ir3_shader_variant {
/* Whether we should use the new per-wave layout rather than per-fiber. */
bool pvtmem_per_wave;
/* Whether multi-position output is enabled. */
bool multi_pos_output;
/* Size in bytes of required shared memory */
unsigned shared_size;

View file

@ -74,11 +74,8 @@ lower_multiview_mask(nir_shader *nir, uint32_t *mask)
}
bool
tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
struct tu_device *dev)
tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, struct tu_device *dev)
{
*multi_pos_output = false;
bool progress = false;
if (!dev->physical_device->info->a6xx.supports_multiview_mask)
@ -105,8 +102,6 @@ tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
if (likely(!(dev->physical_device->instance->debug_flags & TU_DEBUG_NOMULTIPOS)) &&
num_views <= max_views_for_multipos && num_outputs + (num_views - 1) <= 32 &&
nir_can_lower_multiview(nir)) {
*multi_pos_output = true;
/* It appears that the multiview mask is ignored when multi-position
* output is enabled, so we have to write 0 to inactive views ourselves.
*/

View file

@ -1814,7 +1814,7 @@ tu6_emit_program(struct tu_cs *cs,
gl_shader_stage stage = MESA_SHADER_VERTEX;
uint32_t cps_per_patch = builder->create_info->pTessellationState ?
builder->create_info->pTessellationState->patchControlPoints : 0;
bool multi_pos_output = builder->shaders->multi_pos_output;
bool multi_pos_output = vs->multi_pos_output;
/* Don't use the binning pass variant when GS is present because we don't
* support compiling correct binning pass variants with GS.
@ -2782,7 +2782,6 @@ tu_shaders_serialize(struct vk_pipeline_cache_object *object,
blob_write_bytes(blob, shaders->push_consts, sizeof(shaders->push_consts));
blob_write_uint8(blob, shaders->active_desc_sets);
blob_write_uint8(blob, shaders->multi_pos_output);
for (unsigned i = 0; i < ARRAY_SIZE(shaders->variants); i++) {
if (shaders->variants[i]) {
@ -2810,7 +2809,6 @@ tu_shaders_deserialize(struct vk_device *_device,
blob_copy_bytes(blob, shaders->push_consts, sizeof(shaders->push_consts));
shaders->active_desc_sets = blob_read_uint8(blob);
shaders->multi_pos_output = blob_read_uint8(blob);
for (unsigned i = 0; i < ARRAY_SIZE(shaders->variants); i++) {
bool has_shader = blob_read_uint8(blob);
@ -3026,8 +3024,6 @@ tu_pipeline_builder_compile_shaders(struct tu_pipeline_builder *builder,
}
compiled_shaders->active_desc_sets = desc_sets;
compiled_shaders->multi_pos_output =
shaders[MESA_SHADER_VERTEX]->multi_pos_output;
for (gl_shader_stage stage = MESA_SHADER_VERTEX;
stage < ARRAY_SIZE(shaders); stage++) {

View file

@ -56,7 +56,6 @@ struct tu_compiled_shaders
struct tu_push_constant_range push_consts[MESA_SHADER_STAGES];
uint8_t active_desc_sets;
bool multi_pos_output;
struct ir3_shader_variant *variants[MESA_SHADER_STAGES];
};

View file

@ -780,8 +780,7 @@ tu_shader_create(struct tu_device *dev,
ir3_nir_lower_io_to_temporaries(nir);
if (nir->info.stage == MESA_SHADER_VERTEX && key->multiview_mask) {
tu_nir_lower_multiview(nir, key->multiview_mask,
&shader->multi_pos_output, dev);
tu_nir_lower_multiview(nir, key->multiview_mask, dev);
}
if (nir->info.stage == MESA_SHADER_FRAGMENT && key->force_sample_interp) {

View file

@ -24,7 +24,6 @@ struct tu_shader
struct tu_push_constant_range push_consts;
uint8_t active_desc_sets;
bool multi_pos_output;
};
struct tu_shader_key {
@ -34,8 +33,7 @@ struct tu_shader_key {
};
bool
tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, bool *multi_pos_output,
struct tu_device *dev);
tu_nir_lower_multiview(nir_shader *nir, uint32_t mask, struct tu_device *dev);
nir_shader *
tu_spirv_to_nir(struct tu_device *dev,