diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 5eb75d324f6..c23a5d9981e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -4239,12 +4239,16 @@ lookup_ps_epilog(struct radv_cmd_buffer *cmd_buffer)
       state.need_src_alpha |= 0x1;
    }
 
-   if (ps && ps->info.ps.exports_mrtz_via_epilog) {
-      assert(device->physical_device->rad_info.gfx_level >= GFX11);
-      state.export_depth = ps->info.ps.writes_z;
-      state.export_stencil = ps->info.ps.writes_stencil;
-      state.export_sample_mask = ps->info.ps.writes_sample_mask;
-      state.alpha_to_coverage_via_mrtz = d->vk.ms.alpha_to_coverage_enable;
+   if (ps) {
+      state.colors_written = ps->info.ps.colors_written;
+
+      if (ps->info.ps.exports_mrtz_via_epilog) {
+         assert(device->physical_device->rad_info.gfx_level >= GFX11);
+         state.export_depth = ps->info.ps.writes_z;
+         state.export_stencil = ps->info.ps.writes_stencil;
+         state.export_sample_mask = ps->info.ps.writes_sample_mask;
+         state.alpha_to_coverage_via_mrtz = d->vk.ms.alpha_to_coverage_enable;
+      }
    }
 
    struct radv_ps_epilog_key key = radv_generate_ps_epilog_key(device, &state);
diff --git a/src/amd/vulkan/radv_pipeline_graphics.c b/src/amd/vulkan/radv_pipeline_graphics.c
index ddebb2d3b7e..2e7078f3fe3 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -1726,6 +1726,7 @@ radv_generate_ps_epilog_key(const struct radv_device *device, const struct radv_
    key.color_is_int8 = device->physical_device->rad_info.gfx_level < GFX8 ? is_int8 : 0;
    key.color_is_int10 = device->physical_device->rad_info.gfx_level < GFX8 ? is_int10 : 0;
    key.enable_mrt_output_nan_fixup = device->instance->drirc.enable_mrt_output_nan_fixup ? is_float32 : 0;
+   key.colors_written = state->colors_written;
    key.mrt0_is_dual_src = state->mrt0_is_dual_src;
    key.export_depth = state->export_depth;
    key.export_stencil = state->export_stencil;
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 7aea07f3fe7..46dc641bcd4 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1832,6 +1832,7 @@ struct radv_ps_epilog_state {
    uint32_t color_write_mask;
    uint32_t color_blend_enable;
 
+   uint32_t colors_written;
    bool mrt0_is_dual_src;
    bool export_depth;
    bool export_stencil;
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 5b5dac58bb6..42c308e39cf 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -103,6 +103,7 @@ struct radv_ps_epilog_key {
    uint8_t color_is_int10;
    uint8_t enable_mrt_output_nan_fixup;
 
+   uint32_t colors_written;
    bool mrt0_is_dual_src;
    bool export_depth;
    bool export_stencil;
diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c
index 3518ecf31a5..ed2838f8a44 100644
--- a/src/amd/vulkan/radv_shader_args.c
+++ b/src/amd/vulkan/radv_shader_args.c
@@ -835,9 +835,9 @@ radv_declare_ps_epilog_args(const struct radv_device *device, const struct radv_
 
    /* Declare VGPR arguments for color exports. */
    for (unsigned i = 0; i < MAX_RTS; i++) {
-      unsigned col_format = (key->spi_shader_col_format >> (i * 4)) & 0xf;
+      const uint8_t color = (key->colors_written >> (i * 4) & 0xf);
 
-      if (col_format == V_028714_SPI_SHADER_ZERO) {
+      if (!color) {
          ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_FLOAT, NULL);
          continue;
       }