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nvk: Move more states to dynamic

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24326>
This commit is contained in:
Faith Ekstrand 2023-01-30 20:12:01 -06:00 • committed by Marge Bot
parent 350e851b47
commit 574b92ded6
3 changed files with 58 additions and 48 deletions
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56
src/nouveau/vulkan/nvk_cmd_draw.c
View file

@ -693,7 +693,7 @@ nvk_flush_vp_state(struct nvk_cmd_buffer *cmd)
&cmd->vk.dynamic_graphics_state;
struct nv_push *p =
nvk_cmd_buffer_push(cmd, 14 * dyn->vp.viewport_count + 4 * NVK_MAX_VIEWPORTS);
nvk_cmd_buffer_push(cmd, 16 * dyn->vp.viewport_count + 4 * NVK_MAX_VIEWPORTS);
/* Nothing to do for MESA_VK_DYNAMIC_VP_VIEWPORT_COUNT */
@ -739,6 +739,13 @@ nvk_flush_vp_state(struct nvk_cmd_buffer *cmd)
}
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE)) {
P_IMMD(p, NV9097, SET_VIEWPORT_Z_CLIP,
dyn->vp.depth_clip_negative_one_to_one ?
RANGE_NEGATIVE_W_TO_POSITIVE_W :
RANGE_ZERO_TO_POSITIVE_W);
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_SCISSOR_COUNT)) {
for (unsigned i = dyn->vp.scissor_count; i < NVK_MAX_VIEWPORTS; i++)
P_IMMD(p, NV9097, SET_SCISSOR_ENABLE(i), V_FALSE);
@ -767,6 +774,21 @@ nvk_flush_vp_state(struct nvk_cmd_buffer *cmd)
}
}
static uint32_t
vk_to_nv9097_polygon_mode(VkPolygonMode vk_mode)
{
ASSERTED uint16_t vk_to_nv9097[] = {
[VK_POLYGON_MODE_FILL] = NV9097_SET_FRONT_POLYGON_MODE_V_FILL,
[VK_POLYGON_MODE_LINE] = NV9097_SET_FRONT_POLYGON_MODE_V_LINE,
[VK_POLYGON_MODE_POINT] = NV9097_SET_FRONT_POLYGON_MODE_V_POINT,
};
assert(vk_mode < ARRAY_SIZE(vk_to_nv9097));
uint32_t nv9097_mode = 0x1b00 | (2 - vk_mode);
assert(nv9097_mode == vk_to_nv9097[vk_mode]);
return nv9097_mode;
}
static uint32_t
vk_to_nv9097_cull_mode(VkCullModeFlags vk_cull_mode)
{
@ -798,10 +820,20 @@ vk_to_nv9097_front_face(VkFrontFace vk_face)
return nv9097_face;
}
static uint32_t
vk_to_nv9097_provoking_vertex(VkProvokingVertexModeEXT vk_mode)
{
STATIC_ASSERT(VK_PROVOKING_VERTEX_MODE_FIRST_VERTEX_EXT ==
NV9097_SET_PROVOKING_VERTEX_V_FIRST);
STATIC_ASSERT(VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT ==
NV9097_SET_PROVOKING_VERTEX_V_LAST);
return vk_mode;
}
static void
nvk_flush_rs_state(struct nvk_cmd_buffer *cmd)
{
struct nv_push *p = nvk_cmd_buffer_push(cmd, 23);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 32);
const struct vk_dynamic_graphics_state *dyn =
&cmd->vk.dynamic_graphics_state;
@ -809,6 +841,13 @@ nvk_flush_rs_state(struct nvk_cmd_buffer *cmd)
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_RASTERIZER_DISCARD_ENABLE))
P_IMMD(p, NV9097, SET_RASTER_ENABLE, !dyn->rs.rasterizer_discard_enable);
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_POLYGON_MODE)) {
uint32_t polygon_mode = vk_to_nv9097_polygon_mode(dyn->rs.polygon_mode);
P_MTHD(p, NV9097, SET_FRONT_POLYGON_MODE);
P_NV9097_SET_FRONT_POLYGON_MODE(p, polygon_mode);
P_NV9097_SET_BACK_POLYGON_MODE(p, polygon_mode);
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_CULL_MODE)) {
P_IMMD(p, NV9097, OGL_SET_CULL, dyn->rs.cull_mode != VK_CULL_MODE_NONE);
@ -823,6 +862,11 @@ nvk_flush_rs_state(struct nvk_cmd_buffer *cmd)
vk_to_nv9097_front_face(dyn->rs.front_face));
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_PROVOKING_VERTEX)) {
P_IMMD(p, NV9097, SET_PROVOKING_VERTEX,
vk_to_nv9097_provoking_vertex(dyn->rs.provoking_vertex));
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_BIAS_ENABLE)) {
P_MTHD(p, NV9097, SET_POLY_OFFSET_POINT);
P_NV9097_SET_POLY_OFFSET_POINT(p, dyn->rs.depth_bias.enable);
@ -842,6 +886,9 @@ nvk_flush_rs_state(struct nvk_cmd_buffer *cmd)
P_NV9097_SET_ALIASED_LINE_WIDTH_FLOAT(p, fui(dyn->rs.line.width));
}
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_STIPPLE_ENABLE))
P_IMMD(p, NV9097, SET_LINE_STIPPLE, dyn->rs.line.stipple.enable);
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_STIPPLE)) {
P_IMMD(p, NV9097, SET_LINE_STIPPLE_PARAMETERS, {
.factor = dyn->rs.line.stipple.factor,
@ -986,11 +1033,14 @@ vk_to_nv9097_logic_op(VkLogicOp vk_op)
static void
nvk_flush_cb_state(struct nvk_cmd_buffer *cmd)
{
struct nv_push *p = nvk_cmd_buffer_push(cmd, 7);
struct nv_push *p = nvk_cmd_buffer_push(cmd, 9);
const struct vk_dynamic_graphics_state *dyn =
&cmd->vk.dynamic_graphics_state;
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP_ENABLE))
P_IMMD(p, NV9097, SET_LOGIC_OP, dyn->cb.logic_op_enable);
if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP)) {
const uint32_t func = vk_to_nv9097_logic_op(dyn->cb.logic_op);
P_IMMD(p, NV9097, SET_LOGIC_OP_FUNC, func);

40
src/nouveau/vulkan/nvk_graphics_pipeline.c
View file

@ -25,34 +25,6 @@ static void
emit_pipeline_vp_state(struct nv_push *p,
const struct vk_viewport_state *vp)
{
P_IMMD(p, NV9097, SET_VIEWPORT_Z_CLIP, vp->depth_clip_negative_one_to_one ?
RANGE_NEGATIVE_W_TO_POSITIVE_W :
RANGE_ZERO_TO_POSITIVE_W);
}
static uint32_t
vk_to_nv9097_polygon_mode(VkPolygonMode vk_mode)
{
ASSERTED uint16_t vk_to_nv9097[] = {
[VK_POLYGON_MODE_FILL] = NV9097_SET_FRONT_POLYGON_MODE_V_FILL,
[VK_POLYGON_MODE_LINE] = NV9097_SET_FRONT_POLYGON_MODE_V_LINE,
[VK_POLYGON_MODE_POINT] = NV9097_SET_FRONT_POLYGON_MODE_V_POINT,
};
assert(vk_mode < ARRAY_SIZE(vk_to_nv9097));
uint32_t nv9097_mode = 0x1b00 | (2 - vk_mode);
assert(nv9097_mode == vk_to_nv9097[vk_mode]);
return nv9097_mode;
}
static uint32_t
vk_to_nv9097_provoking_vertex(VkProvokingVertexModeEXT vk_mode)
{
STATIC_ASSERT(VK_PROVOKING_VERTEX_MODE_FIRST_VERTEX_EXT ==
NV9097_SET_PROVOKING_VERTEX_V_FIRST);
STATIC_ASSERT(VK_PROVOKING_VERTEX_MODE_LAST_VERTEX_EXT ==
NV9097_SET_PROVOKING_VERTEX_V_LAST);
return vk_mode;
}
static void
@ -70,19 +42,9 @@ emit_pipeline_rs_state(struct nv_push *p,
.geometry_guardband_z = GEOMETRY_GUARDBAND_Z_SAME_AS_XY_GUARDBAND,
});
const uint32_t polygon_mode = vk_to_nv9097_polygon_mode(rs->polygon_mode);
P_MTHD(p, NV9097, SET_FRONT_POLYGON_MODE);
P_NV9097_SET_FRONT_POLYGON_MODE(p, polygon_mode);
P_NV9097_SET_BACK_POLYGON_MODE(p, polygon_mode);
P_IMMD(p, NV9097, SET_PROVOKING_VERTEX,
vk_to_nv9097_provoking_vertex(rs->provoking_vertex));
assert(rs->rasterization_stream == 0);
assert(rs->line.mode == VK_LINE_RASTERIZATION_MODE_DEFAULT_EXT);
P_IMMD(p, NV9097, SET_LINE_STIPPLE, rs->line.stipple.enable);
}
static void
@ -155,8 +117,6 @@ emit_pipeline_cb_state(struct nv_push *p,
{
P_IMMD(p, NV9097, SET_BLEND_STATE_PER_TARGET, ENABLE_TRUE);
P_IMMD(p, NV9097, SET_LOGIC_OP, cb->logic_op_enable);
for (uint32_t a = 0; a < cb->attachment_count; a++) {
const struct vk_color_blend_attachment_state *att = &cb->attachments[a];
P_IMMD(p, NV9097, SET_BLEND(a), att->blend_enable);

10
src/nouveau/vulkan/nvk_physical_device.c
View file

@ -130,12 +130,12 @@ nvk_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
VkPhysicalDeviceExtendedDynamicState3FeaturesEXT *f = (void *)ext;
f->extendedDynamicState3TessellationDomainOrigin = false;
f->extendedDynamicState3DepthClampEnable = false;
f->extendedDynamicState3PolygonMode = false;
f->extendedDynamicState3PolygonMode = true;
f->extendedDynamicState3RasterizationSamples = false;
f->extendedDynamicState3SampleMask = false;
f->extendedDynamicState3AlphaToCoverageEnable = false;
f->extendedDynamicState3AlphaToOneEnable = false;
f->extendedDynamicState3LogicOpEnable = false;
f->extendedDynamicState3LogicOpEnable = true;
f->extendedDynamicState3ColorBlendEnable = false;
f->extendedDynamicState3ColorBlendEquation = false;
f->extendedDynamicState3ColorWriteMask = false;
@ -145,10 +145,10 @@ nvk_GetPhysicalDeviceFeatures2(VkPhysicalDevice physicalDevice,
f->extendedDynamicState3DepthClipEnable = false;
f->extendedDynamicState3SampleLocationsEnable = false;
f->extendedDynamicState3ColorBlendAdvanced = false;
f->extendedDynamicState3ProvokingVertexMode = false;
f->extendedDynamicState3ProvokingVertexMode = true;
f->extendedDynamicState3LineRasterizationMode = false;
f->extendedDynamicState3LineStippleEnable = false;
f->extendedDynamicState3DepthClipNegativeOneToOne = false;
f->extendedDynamicState3LineStippleEnable = true;
f->extendedDynamicState3DepthClipNegativeOneToOne = true;
f->extendedDynamicState3ViewportWScalingEnable = false;
f->extendedDynamicState3ViewportSwizzle = false;
f->extendedDynamicState3CoverageToColorEnable = false;