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radv: update PS num_vgprs in case of epilogs rather than overallocating VGPRs

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22267>
This commit is contained in:
Daniel Schürmann 2023-04-03 12:15:36 +02:00 • committed by Marge Bot
parent 4c7a5b1e51
commit 5c362cde33
2 changed files with 6 additions and 10 deletions
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10
src/amd/vulkan/radv_cmd_buffer.c
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@ -1846,10 +1846,12 @@ radv_emit_ps_epilog_state(struct radv_cmd_buffer *cmd_buffer, struct radv_shader
radeon_set_context_reg(cmd_buffer->cs, R_02823C_CB_SHADER_MASK,
ac_get_cb_shader_mask(ps_epilog->spi_shader_col_format));
/* The main shader must not use less VGPRs than the epilog, otherwise shared vgprs might not
* work.
*/
assert(G_00B848_VGPRS(ps_shader->config.rsrc1) >= G_00B848_VGPRS(ps_epilog->rsrc1));
assert(ps_shader->config.num_shared_vgprs == 0);
if (G_00B848_VGPRS(ps_epilog->rsrc1) > G_00B848_VGPRS(ps_shader->config.rsrc1)) {
uint32_t rsrc1 = ps_shader->config.rsrc1;
rsrc1 = (rsrc1 & C_00B848_VGPRS) | (ps_epilog->rsrc1 & ~C_00B848_VGPRS);
radeon_set_sh_reg(cmd_buffer->cs, R_00B028_SPI_SHADER_PGM_RSRC1_PS, rsrc1);
}
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, ps_epilog->bo);

6
src/amd/vulkan/radv_shader_args.c
View file

@ -311,12 +311,6 @@ declare_ps_input_vgprs(const struct radv_shader_info *info, struct radv_shader_a
vgpr_arg++;
}
}
if (info->ps.has_epilog) {
/* FIXME: Ensure the main shader doesn't have less VGPRs than the epilog */
for (unsigned i = 0; i < MAX_RTS; i++)
ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_INT, NULL);
}
}
static void