diff --git a/src/asahi/lib/agx_nir_lower_vbo.c b/src/asahi/lib/agx_nir_lower_vbo.c
index ecf7ce8c3c9..b10359b2ce7 100644
--- a/src/asahi/lib/agx_nir_lower_vbo.c
+++ b/src/asahi/lib/agx_nir_lower_vbo.c
@@ -113,14 +113,14 @@ pass(struct nir_builder *b, nir_instr *instr, void *data)
    if (intr->intrinsic != nir_intrinsic_load_input)
       return false;
 
-   struct agx_vbufs *vbufs = data;
+   struct agx_attribute *attribs = data;
    b->cursor = nir_before_instr(instr);
 
    nir_src *offset_src = nir_get_io_offset_src(intr);
    assert(nir_src_is_const(*offset_src) && "no attribute indirects");
    unsigned index = nir_intrinsic_base(intr) + nir_src_as_uint(*offset_src);
 
-   struct agx_attribute attrib = vbufs->attributes[index];
+   struct agx_attribute attrib = attribs[index];
    uint32_t stride = attrib.stride;
    uint16_t offset = attrib.src_offset;
 
@@ -262,9 +262,9 @@ pass(struct nir_builder *b, nir_instr *instr, void *data)
 }
 
 bool
-agx_nir_lower_vbo(nir_shader *shader, struct agx_vbufs *vbufs)
+agx_nir_lower_vbo(nir_shader *shader, struct agx_attribute *attribs)
 {
    assert(shader->info.stage == MESA_SHADER_VERTEX);
    return nir_shader_instructions_pass(
-      shader, pass, nir_metadata_block_index | nir_metadata_dominance, vbufs);
+      shader, pass, nir_metadata_block_index | nir_metadata_dominance, attribs);
 }
diff --git a/src/asahi/lib/agx_nir_lower_vbo.h b/src/asahi/lib/agx_nir_lower_vbo.h
index 0acc9e6c5a3..7700608c865 100644
--- a/src/asahi/lib/agx_nir_lower_vbo.h
+++ b/src/asahi/lib/agx_nir_lower_vbo.h
@@ -31,11 +31,7 @@ struct agx_attribute {
    uint8_t format;
 };
 
-struct agx_vbufs {
-   struct agx_attribute attributes[AGX_MAX_ATTRIBS];
-};
-
-bool agx_nir_lower_vbo(nir_shader *shader, struct agx_vbufs *vbufs);
+bool agx_nir_lower_vbo(nir_shader *shader, struct agx_attribute *attribs);
 bool agx_vbo_supports_format(enum pipe_format format);
 
 #ifdef __cplusplus
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 244ea90c188..39358fc03a6 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -1787,7 +1787,7 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx,
    if (nir->info.stage == MESA_SHADER_VERTEX) {
       struct asahi_vs_shader_key *key = &key_->vs;
 
-      NIR_PASS_V(nir, agx_nir_lower_vbo, &key->vbuf);
+      NIR_PASS_V(nir, agx_nir_lower_vbo, key->attribs);
       NIR_PASS_V(nir, agx_nir_lower_point_size, key->program_point_size);
 
       if (should_lower_clip_m1_1(dev, key->clip_halfz)) {
@@ -1810,7 +1810,7 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx,
       nir_shader *vs = nir_deserialize(NULL, &agx_nir_options, &vs_reader);
 
       /* Apply the VS key to the VS before linking it in */
-      NIR_PASS_V(vs, agx_nir_lower_vbo, &key->vbuf);
+      NIR_PASS_V(vs, agx_nir_lower_vbo, key->attribs);
       NIR_PASS_V(vs, agx_nir_lower_ia, &key->ia);
 
       NIR_PASS_V(vs, nir_lower_io_to_scalar, nir_var_shader_out, NULL, NULL);
@@ -2105,7 +2105,7 @@ agx_create_shader_state(struct pipe_context *pctx,
       switch (so->type) {
       case PIPE_SHADER_VERTEX: {
          for (unsigned i = 0; i < AGX_MAX_VBUFS; ++i) {
-            key.vs.vbuf.attributes[i] = (struct agx_attribute){
+            key.vs.attribs[i] = (struct agx_attribute){
                .buf = i,
                .stride = 16,
                .format = PIPE_FORMAT_R32G32B32A32_FLOAT,
@@ -2267,8 +2267,8 @@ agx_update_vs(struct agx_context *ctx)
          ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.inputs_linear_shaded,
    };
 
-   memcpy(key.vbuf.attributes, ctx->attributes,
-          sizeof(key.vbuf.attributes[0]) * AGX_MAX_ATTRIBS);
+   memcpy(key.attribs, ctx->attributes,
+          sizeof(key.attribs[0]) * AGX_MAX_ATTRIBS);
 
    return agx_update_shader(ctx, &ctx->vs, PIPE_SHADER_VERTEX,
                             (union asahi_shader_key *)&key);
@@ -2325,8 +2325,8 @@ agx_update_gs(struct agx_context *ctx, const struct pipe_draw_info *info,
       .rasterizer_discard = ctx->rast->base.rasterizer_discard,
    };
 
-   memcpy(key.vbuf.attributes, ctx->attributes,
-          sizeof(key.vbuf.attributes[0]) * AGX_MAX_ATTRIBS);
+   memcpy(key.attribs, ctx->attributes,
+          sizeof(key.attribs[0]) * AGX_MAX_ATTRIBS);
 
    static_assert(sizeof(key.input_nir_sha1) ==
                     sizeof(ctx->stage[PIPE_SHADER_VERTEX].shader->nir_sha1),
diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h
index 514f3302ebf..1f8622753b8 100644
--- a/src/gallium/drivers/asahi/agx_state.h
+++ b/src/gallium/drivers/asahi/agx_state.h
@@ -376,7 +376,7 @@ struct agx_blend {
 };
 
 struct asahi_vs_shader_key {
-   struct agx_vbufs vbuf;
+   struct agx_attribute attribs[AGX_MAX_VBUFS];
    bool clip_halfz;
    bool program_point_size;
    uint64_t outputs_flat_shaded;
@@ -402,7 +402,7 @@ struct asahi_gs_shader_key {
    struct agx_ia_key ia;
 
    /* Vertex shader key */
-   struct agx_vbufs vbuf;
+   struct agx_attribute attribs[AGX_MAX_VBUFS];
 
    /* If true, this GS is run only for its side effects (including XFB) */
    bool rasterizer_discard;