nvk: Implement VK_KHR_pipeline_executable_properties
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9621 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26241>
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parent
3b3b157961
commit
7e00380445
6 changed files with 162 additions and 6 deletions
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@ -176,6 +176,9 @@ nvk_compute_pipeline_create(struct nvk_device *dev,
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assert(pCreateInfo->stage.stage == VK_SHADER_STAGE_COMPUTE_BIT);
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VkPipelineCreateFlags2KHR pipeline_flags =
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vk_compute_pipeline_create_flags(pCreateInfo);
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struct vk_pipeline_robustness_state robustness;
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vk_pipeline_robustness_state_fill(&dev->vk, &robustness,
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pCreateInfo->pNext,
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@ -189,7 +192,7 @@ nvk_compute_pipeline_create(struct nvk_device *dev,
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nvk_lower_nir(dev, nir, &robustness, false, pipeline_layout);
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result = nvk_compile_nir(pdev, nir, NULL,
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result = nvk_compile_nir(pdev, nir, pipeline_flags, NULL,
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&pipeline->base.shaders[MESA_SHADER_COMPUTE]);
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ralloc_free(nir);
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if (result != VK_SUCCESS)
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@ -314,6 +314,9 @@ nvk_graphics_pipeline_create(struct nvk_device *dev,
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if (pipeline == NULL)
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return vk_error(dev, VK_ERROR_OUT_OF_HOST_MEMORY);
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VkPipelineCreateFlags2KHR pipeline_flags =
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vk_graphics_pipeline_create_flags(pCreateInfo);
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struct vk_graphics_pipeline_all_state all;
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struct vk_graphics_pipeline_state state = {};
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result = vk_graphics_pipeline_state_fill(&dev->vk, &state, pCreateInfo,
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@ -358,7 +361,7 @@ nvk_graphics_pipeline_create(struct nvk_device *dev,
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fs_key = &fs_key_tmp;
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}
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result = nvk_compile_nir(pdev, nir[stage], fs_key,
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result = nvk_compile_nir(pdev, nir[stage], pipeline_flags, fs_key,
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&pipeline->base.shaders[stage]);
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ralloc_free(nir[stage]);
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if (result != VK_SUCCESS)
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@ -73,6 +73,7 @@ nvk_get_device_extensions(const struct nv_device_info *info,
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.KHR_maintenance4 = true,
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.KHR_map_memory2 = true,
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.KHR_multiview = true,
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.KHR_pipeline_executable_properties = true,
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.KHR_push_descriptor = true,
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.KHR_relaxed_block_layout = true,
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.KHR_sampler_mirror_clamp_to_edge = true,
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@ -251,6 +252,9 @@ nvk_get_device_features(const struct nv_device_info *info,
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.dynamicRendering = true,
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.maintenance4 = true,
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/* VK_KHR_pipeline_executable_properties */
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.pipelineExecutableInfo = true,
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/* VK_KHR_shader_clock */
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.shaderSubgroupClock = true,
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.shaderDeviceClock = true,
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@ -112,3 +112,141 @@ nvk_DestroyPipeline(VkDevice _device, VkPipeline _pipeline,
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nvk_pipeline_free(dev, pipeline, pAllocator);
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}
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#define WRITE_STR(field, ...) ({ \
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memset(field, 0, sizeof(field)); \
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UNUSED int i = snprintf(field, sizeof(field), __VA_ARGS__); \
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assert(i > 0 && i < sizeof(field)); \
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})
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VKAPI_ATTR VkResult VKAPI_CALL
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nvk_GetPipelineExecutablePropertiesKHR(
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VkDevice device,
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const VkPipelineInfoKHR *pPipelineInfo,
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uint32_t *pExecutableCount,
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VkPipelineExecutablePropertiesKHR *pProperties)
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{
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VK_FROM_HANDLE(nvk_pipeline, pipeline, pPipelineInfo->pipeline);
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VK_OUTARRAY_MAKE_TYPED(VkPipelineExecutablePropertiesKHR, out,
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pProperties, pExecutableCount);
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for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) {
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if (pipeline->shaders[stage].code_size == 0)
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continue;
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vk_outarray_append_typed(VkPipelineExecutablePropertiesKHR, &out, props) {
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props->stages = mesa_to_vk_shader_stage(stage);
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props->subgroupSize = 32;
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WRITE_STR(props->name, "%s", _mesa_shader_stage_to_string(stage));
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WRITE_STR(props->description, "%s shader",
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_mesa_shader_stage_to_string(stage));
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}
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}
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return vk_outarray_status(&out);
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}
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static struct nvk_shader *
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shader_for_exe_idx(struct nvk_pipeline *pipeline, uint32_t idx)
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{
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for (gl_shader_stage stage = 0; stage < MESA_SHADER_STAGES; stage++) {
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if (pipeline->shaders[stage].code_size == 0)
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continue;
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if (idx == 0)
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return &pipeline->shaders[stage];
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idx--;
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}
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return NULL;
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}
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VKAPI_ATTR VkResult VKAPI_CALL
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nvk_GetPipelineExecutableStatisticsKHR(
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VkDevice device,
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const VkPipelineExecutableInfoKHR *pExecutableInfo,
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uint32_t *pStatisticCount,
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VkPipelineExecutableStatisticKHR *pStatistics)
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{
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VK_FROM_HANDLE(nvk_pipeline, pipeline, pExecutableInfo->pipeline);
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VK_OUTARRAY_MAKE_TYPED(VkPipelineExecutableStatisticKHR, out,
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pStatistics, pStatisticCount);
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struct nvk_shader *shader =
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shader_for_exe_idx(pipeline, pExecutableInfo->executableIndex);
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vk_outarray_append_typed(VkPipelineExecutableStatisticKHR, &out, stat) {
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WRITE_STR(stat->name, "Code Size");
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WRITE_STR(stat->description,
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"Size of the compiled shader binary, in bytes");
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stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
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stat->value.u64 = shader->code_size;
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}
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vk_outarray_append_typed(VkPipelineExecutableStatisticKHR, &out, stat) {
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WRITE_STR(stat->name, "Number of GPRs");
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WRITE_STR(stat->description, "Number of GPRs used by this pipeline");
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stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
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stat->value.u64 = shader->info.num_gprs;
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}
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vk_outarray_append_typed(VkPipelineExecutableStatisticKHR, &out, stat) {
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WRITE_STR(stat->name, "SLM Size");
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WRITE_STR(stat->description,
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"Size of shader local (scratch) memory, in bytes");
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stat->format = VK_PIPELINE_EXECUTABLE_STATISTIC_FORMAT_UINT64_KHR;
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stat->value.u64 = shader->info.slm_size;
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}
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return vk_outarray_status(&out);
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}
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static bool
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write_ir_text(VkPipelineExecutableInternalRepresentationKHR* ir,
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const char *data)
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{
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ir->isText = VK_TRUE;
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size_t data_len = strlen(data) + 1;
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if (ir->pData == NULL) {
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ir->dataSize = data_len;
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return true;
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}
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strncpy(ir->pData, data, ir->dataSize);
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if (ir->dataSize < data_len)
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return false;
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ir->dataSize = data_len;
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return true;
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}
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VKAPI_ATTR VkResult VKAPI_CALL
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nvk_GetPipelineExecutableInternalRepresentationsKHR(
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VkDevice device,
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const VkPipelineExecutableInfoKHR *pExecutableInfo,
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uint32_t *pInternalRepresentationCount,
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VkPipelineExecutableInternalRepresentationKHR* pInternalRepresentations)
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{
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VK_FROM_HANDLE(nvk_pipeline, pipeline, pExecutableInfo->pipeline);
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VK_OUTARRAY_MAKE_TYPED(VkPipelineExecutableInternalRepresentationKHR, out,
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pInternalRepresentations,
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pInternalRepresentationCount);
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bool incomplete_text = false;
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struct nvk_shader *shader =
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shader_for_exe_idx(pipeline, pExecutableInfo->executableIndex);
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if (shader->nak != NULL && shader->nak->asm_str != NULL) {
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vk_outarray_append_typed(VkPipelineExecutableInternalRepresentationKHR, &out, ir) {
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WRITE_STR(ir->name, "NAK assembly");
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WRITE_STR(ir->description, "NAK assembly");
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if (!write_ir_text(ir, shader->nak->asm_str))
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incomplete_text = true;
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}
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}
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return incomplete_text ? VK_INCOMPLETE : vk_outarray_status(&out);
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}
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@ -395,10 +395,14 @@ nvk_shader_dump(struct nvk_shader *shader)
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static VkResult
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nvk_compile_nir_with_nak(struct nvk_physical_device *pdev,
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nir_shader *nir,
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VkPipelineCreateFlagBits2KHR pipeline_flags,
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const struct nak_fs_key *fs_key,
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struct nvk_shader *shader)
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{
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shader->nak = nak_compile_shader(nir, false, pdev->nak, fs_key);
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const bool dump_asm =
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pipeline_flags & VK_PIPELINE_CREATE_2_CAPTURE_INTERNAL_REPRESENTATIONS_BIT_KHR;
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shader->nak = nak_compile_shader(nir, dump_asm, pdev->nak, fs_key);
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shader->info = shader->nak->info;
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shader->code_ptr = shader->nak->code;
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shader->code_size = shader->nak->code_size;
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@ -408,13 +412,16 @@ nvk_compile_nir_with_nak(struct nvk_physical_device *pdev,
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VkResult
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nvk_compile_nir(struct nvk_physical_device *pdev, nir_shader *nir,
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VkPipelineCreateFlagBits2KHR pipeline_flags,
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const struct nak_fs_key *fs_key,
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struct nvk_shader *shader)
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{
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if (use_nak(pdev, nir->info.stage))
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return nvk_compile_nir_with_nak(pdev, nir, fs_key, shader);
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else
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if (use_nak(pdev, nir->info.stage)) {
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return nvk_compile_nir_with_nak(pdev, nir, pipeline_flags,
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fs_key, shader);
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} else {
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return nvk_cg_compile_nir(pdev, nir, fs_key, shader);
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}
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}
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VkResult
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@ -90,6 +90,7 @@ nvk_lower_nir(struct nvk_device *dev, nir_shader *nir,
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VkResult
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nvk_compile_nir(struct nvk_physical_device *dev, nir_shader *nir,
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VkPipelineCreateFlagBits2KHR pipeline_flags,
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const struct nak_fs_key *fs_key,
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struct nvk_shader *shader);
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