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radv: stop clearing CMASK to 0xcc when FMASK is present on GFX9

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This is incorrect because clearing CMASK to 0xCC should only happen
for fast clears with DCC and FMASK/CMASK.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26634>
This commit is contained in:
Samuel Pitoiset 2023-12-14 17:55:46 +01:00 • committed by Marge Bot
parent 1714f7aff4
commit 7ea48145a1
3 changed files with 3 additions and 35 deletions
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4
src/amd/ci/radv-renoir-aco-flakes.txt
View file

@ -1,8 +1,4 @@
dEQP-VK.reconvergence.workgroup_uniform_control_flow_elect.compute.nesting4.2.35
# https://gitlab.freedesktop.org/mesa/mesa/-/issues/8817
dEQP-VK.*framebuffer_attachment.diff_attachments.*
dEQP-VK.*framebuffer_attachment.multi_attachments_not_exported_2d.*
# first noticed in https://gitlab.freedesktop.org/mesa/mesa/-/pipelines/898685
dEQP-VK.pipeline.monolithic.timestamp.calibrated.dev_domain_test

13
src/amd/ci/radv-vega10-aco-flakes.txt
View file

@ -1,13 +0,0 @@
dEQP-VK.multiview.renderpass2.multisample.8_1_1_8
dEQP-VK.multiview.renderpass2.multisample.8
dEQP-VK.multiview.renderpass2.multisample.15_15_15_15
dEQP-VK.multiview.renderpass2.multisample.cmd_copy_query_pool_results.*
dEQP-VK.multiview.renderpass2.multisample.get_query_pool_results.*
dEQP-VK.multiview.dynamic_rendering.multisample.cmd_copy_query_pool_results.*
dEQP-VK.multiview.dynamic_rendering.multisample.get_query_pool_results.*
dEQP-VK.multiview.multisample.get_query_pool_results.*
# https://gitlab.freedesktop.org/mesa/mesa/-/issues/8817
dEQP-VK.*framebuffer_attachment.diff_attachments.*
dEQP-VK.*framebuffer_attachment.multi_attachments_not_exported_2d.*
dEQP-VK.*framebuffer_attachment.resolve_input_same_attachment

21
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -10274,25 +10274,10 @@ radv_init_color_image_metadata(struct radv_cmd_buffer *cmd_buffer, struct radv_i
cmd_buffer->state.flush_bits |= radv_src_access_flush(cmd_buffer, VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT, image);
if (radv_image_has_cmask(image)) {
uint32_t value;
static const uint32_t cmask_clear_values[4] = {0xffffffff, 0xdddddddd, 0xeeeeeeee, 0xffffffff};
uint32_t log2_samples = util_logbase2(image->vk.samples);
if (cmd_buffer->device->physical_device->rad_info.gfx_level == GFX9) {
/* TODO: Fix clearing CMASK layers on GFX9. */
if (radv_image_is_tc_compat_cmask(image) ||
(radv_image_has_fmask(image) &&
radv_layout_can_fast_clear(cmd_buffer->device, image, range->baseMipLevel, dst_layout, dst_queue_mask))) {
value = 0xccccccccu;
} else {
value = 0xffffffffu;
}
} else {
static const uint32_t cmask_clear_values[4] = {0xffffffff, 0xdddddddd, 0xeeeeeeee, 0xffffffff};
uint32_t log2_samples = util_logbase2(image->vk.samples);
value = cmask_clear_values[log2_samples];
}
flush_bits |= radv_init_cmask(cmd_buffer, image, range, value);
flush_bits |= radv_init_cmask(cmd_buffer, image, range, cmask_clear_values[log2_samples]);
}
if (radv_image_has_fmask(image)) {