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pan/bi: Rename CLPER_V6.i32 to CLPER_OLD.i32

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To reflect that it is the CLPER of choice on Mali-G31 which is a v7 target.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17754>
This commit is contained in:
Alyssa Rosenzweig 2022-07-26 10:53:02 -04:00 • committed by Marge Bot
parent d8bd80afeb
commit ac5c1039a2
6 changed files with 8 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/panfrost/bifrost/ISA.xml
View file

@ -3713,7 +3713,7 @@
<src start="6" mask="0xf7"/>
</ins>
<ins name="+CLPER_V6.i32" mask="0xfffc0" exact="0x3f0c0">
<ins name="+CLPER_OLD.i32" mask="0xfffc0" exact="0x3f0c0">
<src start="0" mask="0x7"/>
<src start="3"/>
</ins>

2
src/panfrost/bifrost/bi_helper_invocations.c
View file

@ -99,7 +99,7 @@ bi_instr_uses_helpers(bi_instr *I)
return (I->va_lod_mode == BI_VA_LOD_MODE_COMPUTED_LOD) ||
(I->va_lod_mode == BI_VA_LOD_MODE_COMPUTED_BIAS);
case BI_OPCODE_CLPER_I32:
case BI_OPCODE_CLPER_V6_I32:
case BI_OPCODE_CLPER_OLD_I32:
/* Fragment shaders require helpers to implement derivatives.
* Other shader stages don't have helpers at all */
return true;

2
src/panfrost/bifrost/bi_lower_swizzle.c
View file

@ -49,7 +49,7 @@ bi_lower_swizzle_16(bi_context *ctx, bi_instr *ins, unsigned src)
* inherently interpret the data, so it can be used for v2f16
* derivatives, which might require swizzle lowering */
case BI_OPCODE_CLPER_I32:
case BI_OPCODE_CLPER_V6_I32:
case BI_OPCODE_CLPER_OLD_I32:
/* Similarly, CSEL.i32 consumes a boolean as a 32-bit argument. If the
* boolean is implemented as a 16-bit integer, the swizzle is needed

2
src/panfrost/bifrost/bi_pack.c
View file

@ -651,7 +651,7 @@ bi_pack_clause(bi_context *ctx, bi_clause *clause,
/* Different GPUs support different forms of the CLPER.i32
* instruction. Check we use the right one for the target.
*/
if (add && add->op == BI_OPCODE_CLPER_V6_I32)
if (add && add->op == BI_OPCODE_CLPER_OLD_I32)
assert(ctx->quirks & BIFROST_LIMITED_CLPER);
else if (add && add->op == BI_OPCODE_CLPER_I32)
assert(!(ctx->quirks & BIFROST_LIMITED_CLPER));

2
src/panfrost/bifrost/bi_schedule.c
View file

@ -628,7 +628,7 @@ bi_reads_temps(bi_instr *ins, unsigned src)
switch (ins->op) {
/* Cannot permute a temporary */
case BI_OPCODE_CLPER_I32:
case BI_OPCODE_CLPER_V6_I32:
case BI_OPCODE_CLPER_OLD_I32:
return src != 0;
case BI_OPCODE_IMULD:
return false;

6
src/panfrost/bifrost/bifrost_compile.c
View file

@ -2211,7 +2211,7 @@ bi_clper_xor(bi_builder *b, bi_index s0, bi_index s1)
bi_index lane_id = bi_fau(BIR_FAU_LANE_ID, false);
bi_index lane = bi_lshift_xor_i32(b, lane_id, s1, bi_imm_u8(0));
return bi_clper_v6_i32(b, s0, lane);
return bi_clper_old_i32(b, s0, lane);
}
static enum bi_cmpf
@ -2708,8 +2708,8 @@ bi_emit_alu(bi_builder *b, nir_alu_instr *instr)
bi_index left, right;
if (b->shader->quirks & BIFROST_LIMITED_CLPER) {
left = bi_clper_v6_i32(b, s0, lane1);
right = bi_clper_v6_i32(b, s0, lane2);
left = bi_clper_old_i32(b, s0, lane1);
right = bi_clper_old_i32(b, s0, lane2);
} else {
left = bi_clper_i32(b, s0, lane1,
BI_INACTIVE_RESULT_ZERO, BI_LANE_OP_NONE,