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ir3: correctly set bit size for 64b constant @load_ubo

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When lowering @load_constant to @load_ubo, the bit size is currently
hard-coded to 32. This causes validation errors when lowering a constant
with a 64b bit size.

This patch fixes this by setting the @load_ubo bit size correctly for
64b constants. This 64b load is later lowered to a 32b load by
ir3_nir_lower_64b_intrinsics.

Fixes Piglit test:
- spec@arb_gpu_shader_fp64@execution@fs-indirect-temp-double-src

This patch has no impact on shader-db.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26191>
This commit is contained in:
Job Noorman 2023-11-14 15:59:34 +01:00 • committed by Marge Bot
parent bb92c34c28
commit bcf0425f7f
1 changed files with 3 additions and 1 deletions
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4
src/freedreno/ir3/ir3_nir_analyze_ubo_ranges.c
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@ -594,6 +594,7 @@ ir3_nir_lower_load_const_instr(nir_builder *b, nir_instr *in_instr, void *data)
}
unsigned num_components = instr->num_components;
unsigned bit_size = instr->def.bit_size;
if (instr->def.bit_size == 16) {
/* We can't do 16b loads -- either from LDC (32-bit only in any of our
* traces, and disasm that doesn't look like it really supports it) or
@ -602,6 +603,7 @@ ir3_nir_lower_load_const_instr(nir_builder *b, nir_instr *in_instr, void *data)
* Instead, we'll load 32b from a UBO and unpack from there.
*/
num_components = DIV_ROUND_UP(num_components, 2);
bit_size = 32;
}
unsigned base = nir_intrinsic_base(instr);
nir_def *index = nir_imm_int(b, const_state->constant_data_ubo);
@ -609,7 +611,7 @@ ir3_nir_lower_load_const_instr(nir_builder *b, nir_instr *in_instr, void *data)
nir_iadd_imm(b, instr->src[0].ssa, base);
nir_def *result =
nir_load_ubo(b, num_components, 32, index, offset,
nir_load_ubo(b, num_components, bit_size, index, offset,
.align_mul = nir_intrinsic_align_mul(instr),
.align_offset = nir_intrinsic_align_offset(instr),
.range_base = base, .range = nir_intrinsic_range(instr));