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nv50,nvc0: allow to create resources other than buffers

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For the compute support, we might stick buffers as surfaces. This fixes
an assertion when executing src/gallium/tests/trivial/compute.

To avoid using these "restricted" surfaces as render targets, these
assertions have been moved. Note that it's already handled for the
framebuffer thing on nvc0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Samuel Pitoiset 2015-12-01 22:40:45 +01:00
parent f391b95105
commit ea33920f7e
5 changed files with 9 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/nouveau/nv50/nv50_resource.c
View file

@ -68,8 +68,6 @@ nv50_surface_create(struct pipe_context *pipe,
struct pipe_resource *pres,
const struct pipe_surface *templ)
{
/* surfaces are assumed to be miptrees all over the place. */
assert(pres->target != PIPE_BUFFER);
if (unlikely(pres->target == PIPE_BUFFER))
return nv50_surface_from_buffer(pipe, pres, templ);
return nv50_miptree_surface_new(pipe, pres, templ);

2
src/gallium/drivers/nouveau/nv50/nv50_state_validate.c
View file

@ -60,6 +60,8 @@ nv50_validate_fb(struct nv50_context *nv50)
PUSH_DATA (push, mt->base.address + sf->offset);
PUSH_DATA (push, nv50_format_table[sf->base.format].rt);
if (likely(nouveau_bo_memtype(bo))) {
assert(sf->base.texture->target != PIPE_BUFFER);
PUSH_DATA (push, mt->level[sf->base.u.tex.level].tile_mode);
PUSH_DATA (push, mt->layer_stride >> 2);
BEGIN_NV04(push, NV50_3D(RT_HORIZ(i)), 2);

3
src/gallium/drivers/nouveau/nv50/nv50_surface.c
View file

@ -286,6 +286,8 @@ nv50_clear_render_target(struct pipe_context *pipe,
struct nouveau_bo *bo = mt->base.bo;
unsigned z;
assert(dst->texture->target != PIPE_BUFFER);
BEGIN_NV04(push, NV50_3D(CLEAR_COLOR(0)), 4);
PUSH_DATAf(push, color->f[0]);
PUSH_DATAf(push, color->f[1]);
@ -371,6 +373,7 @@ nv50_clear_depth_stencil(struct pipe_context *pipe,
uint32_t mode = 0;
unsigned z;
assert(dst->texture->target != PIPE_BUFFER);
assert(nouveau_bo_memtype(bo)); /* ZETA cannot be linear */
if (clear_flags & PIPE_CLEAR_DEPTH) {

2
src/gallium/drivers/nouveau/nvc0/nvc0_resource.c
View file

@ -37,8 +37,6 @@ nvc0_surface_create(struct pipe_context *pipe,
struct pipe_resource *pres,
const struct pipe_surface *templ)
{
/* surfaces are assumed to be miptrees all over the place. */
assert(pres->target != PIPE_BUFFER);
if (unlikely(pres->target == PIPE_BUFFER))
return nv50_surface_from_buffer(pipe, pres, templ);
return nvc0_miptree_surface_new(pipe, pres, templ);

4
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c
View file

@ -288,6 +288,8 @@ nvc0_clear_render_target(struct pipe_context *pipe,
struct nv04_resource *res = nv04_resource(sf->base.texture);
unsigned z;
assert(dst->texture->target != PIPE_BUFFER);
if (!PUSH_SPACE(push, 32 + sf->depth))
return;
@ -516,6 +518,8 @@ nvc0_clear_depth_stencil(struct pipe_context *pipe,
int unk = mt->base.base.target == PIPE_TEXTURE_2D;
unsigned z;
assert(dst->texture->target != PIPE_BUFFER);
if (!PUSH_SPACE(push, 32 + sf->depth))
return;