Commit graph

106464 commits

Author SHA1 Message Date
Rob Clark
6c19d37331 freedreno/a6xx: fix 3d tex layout
Fixes dEQP-GLES3.functional.texture.specification.texstorage3d.size.3d_2x2x2_2_levels

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-09-10 22:08:33 +00:00
Rob Clark
85a23a8991 freedreno/a6xx: don't tile things that are too small
If the lowest (largest) mipmap level is too small to tile, then don't
bother pretending.

Note that this requires initializing pipe->screen before
fd_resource_level_linear() is called.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
2019-09-10 22:08:33 +00:00
Caio Marcelo de Oliveira Filho
15e439071d iris: Enable ARB_gl_spirv and ARB_spirv_extensions
This will also "unlock" OpenGL 4.6 for Iris!

v2: Also enable PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
83fd1e58d8 glsl/nir: Add and use a gl_nir_link() function
Perform all the NIR linking steps in order.  Change iris and i965 to
use it.  Suggested by Alejandro.

v2: Add gl_nir_linker_options struct.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
eca8032f20 gallium: Add ARB_gl_spirv support
The PIPE_CAP_GL_SPIRV capability enables ARB_gl_spirv and
ARB_spirv_extensions, and will make sure the corresponding SPIR-V
capabilities and extensions lists are initialized.

The additional PIPE_CAP_GL_SPIRV_VARIABLE_POINTERS capability enables
the support for Variable Pointers in SPIR-V shaders.  This depends on
the driver and is not mandatory for ARB_gl_spirv support.

v2: Add a PIPE_CAP for Variable Pointers.  (Marek)

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
dccd179ba1 mesa/spirv: Set a few more extensions
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
1a12b0fe36 mesa/st: Don't expect prog->nir to already exist
There's no such case, if we load prog->nir from the shader cache, we
shouldn't hit this path.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
b4b39d9859 mesa/st: Add support for SPIR-V shaders
The SPIR-V codepath uses NIR linking, so we have to preprocess after
the linking steps, which makes things slightly different than GLSL.
To make more clear when the preprocess is happening, I've ended up
inlining st_nir_get_mesa_program() into its caller.

The goal was to make both GLSL and SPIR-V to use the same preprocess
function, the exceptions are:

- SPIR-V codepath don't support NIR state slots yet;
- GLSL lowers shared memory early, so we don't do the deref lowering
  for those.

For now I didn't bother to rename other functions and files (now that
many of them apply to both GLSL and SPIR-V), but we should do this in
further patches.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
18e79e97e5 mesa/st: Extract preprocessing NIR steps
Refactor to split the glsl_to_nir conversion from the preprocessing
NIR passes into separate functions, so we can use them in SPIR-V.
Unlike in GLSL, there we'll need to perform a few passes with the NIR
linker before doing the individual preprocess calls.

No behavior should change with this patch.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
b6384e57f5 mesa/st: Lookup parameters without using names
Use the new MainUniformStorageIndex field in Parameter instead.  It
was added so we could match those in the SPIR-V case, where names are
optional.

v2: Use MainUniformStorageIndex for all cases.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> [v1]
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
d40978f396 mesa/program: Associate uniform storage without using names
Use the new UniformStorageIndex field in Parameter instead.  This
mechanism was added so we could match those in the SPIR-V case, where
names are optional.

v2: Use UniformStorageIndex for all cases.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
4dd1ef9d0a mesa: Fill Parameter storage indices even when not using SPIR-V
When creating Parameters, fill in the associated uniform storage
indices, like it is done with the NIR linker used for SPIR-V.  This
will allow later code to not rely on names (which would never work for
SPIR-V where names are optional).

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
664e4a610d glsl/nir: Fill in the Parameters in NIR linker
The parameter lists were not being created nor filled since i965
doesn't use them.  In Gallium they are used for uniform handling, so
add a way to fill them.

The gl_uniform_storage struct got two new fields that let us go

- from a Parameter to the matching UniformStorage and,
- from the variable to the *first* UniformStorage

without relying on names -- since they are optional for ARB_gl_spirv.
Later patches will make use of them.

v2: Do not fill parameters for i965.  (Timothy)
    Use uint32_t for the new attributes.  (Marek)

v3: Serialize the new fields.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
eea3aa25aa mesa: Pack gl_program_parameter struct
The gl_register_file doesn't need 16 bits, so shorten it and use the
extra room for 'Padded' (also mark it as a single bit).  This shrinks
the struct size from 32 bytes to 24 bytes.

See also 4794fbc86e ("mesa: reduce the size of gl_program_parameter")
that shrinked from 40 to 24 and later 7536af670b ("glsl: fix shader
cache for packed param list") that added `Padded`.

v2: Use just 5 bits for gl_register_file.  (Timothy)

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
eda596d64b compiler: Add glsl_contains_opaque() helper
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
1a96811fe1 mesa/st: Do not rely on name to identify special uniforms
Every uniform that have the "gl_" name also have some state slots.  So
use the state_slots like we did in 57b6184931 ("i965: account for NIR
uniforms without name").

This removes the dependency on names, which are optional when using
ARB_gl_spirv.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2019-09-10 14:36:46 -07:00
Caio Marcelo de Oliveira Filho
4f33f96c45 glsl/nir: Avoid overflow when setting max_uniform_location
Don't use the UNMAPPED_UNIFORM_LOC (-1) to set the unsigned
max_uniform_location.  Those unmapped uniforms don't have to be
accounted at this point.

Fixes: 7a9e5cdfbb ("nir/linker: Add gl_nir_link_uniforms()")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
2019-09-10 14:36:46 -07:00
Dylan Baker
f680cc62f8 meson: build getopt when using msvc
v4: - Don't wrap a single file in a list to match mesa style
    - Use null_dep instead of empty list

Reviewed-by: Eric Anholt <eric@anholt.net> (v3)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-10 20:36:47 +00:00
Dylan Baker
2595b7c997 glapi: export glapi_destroy_multithread when building shared-glapi on windows
Which will allow meson to build a shared glapi build with mingw.

v2: - Add symbol to symbol check test

Reviewed-by: Eric Anholt <eric@anholt.net> (v1)
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-10 20:36:47 +00:00
Dylan Baker
af444d84a3 meson: don't build glapi_static_check_table on windows
It doesn't compile due to undefined symbols, which are in
libglapi_static, so I don't understand the problem.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-10 20:36:47 +00:00
Dylan Baker
a1a8703199 meson: don't try to generate i18n translations on windows
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-10 20:36:47 +00:00
Dylan Baker
26961e2cb5 glsl/tests: Handle windows \r\n new lines
Currently the praser for s expressions assumes that newlines will be \n,
resulting in incorrect parsing on windows, where the newline is \r\n.
This patch just adds \r? to the regular expression used to parse the s
expressions, which fixes at 1 test on windows.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2019-09-10 20:36:46 +00:00
Kenneth Graunke
077a1952cc iris: Fix constant buffer sizes for non-UBOs
Since the system value refactor, we've accidentally only been setting
cbuf->buffer_size in the UBO case, and not in the uploaded-constants
case.  We use cbuf->buffer_size to fill out the SURFACE_STATE entry,
so it needs to be initialized in both cases.

Fixes: 3b6d787e40 ("iris: move sysvals to their own constant buffer")
2019-09-10 10:53:15 -07:00
Samuel Pitoiset
538766792d radv/gfx10: declare a LDS symbol for the NGG emit space
This fixes some interactions when NGG GS is enabled. It fixes:

- dEQP-VK.clipping.user_defined.clip_cull_distance_dynamic_index.*geom*
- dEQP-VK.tessellation.geometry_interaction.passthrough.*

For some reasons, using the computed ESGS ring size randomly hangs
with CTS. For now, just use the maximum LDS size for ESGS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:27:01 +02:00
Samuel Pitoiset
168f8dbafa radv: calculate GFX9 GS and GFX10 NGG states before compiling shader variants
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:58 +02:00
Samuel Pitoiset
e7ee9a6387 radv: store the ESGS ring size as part of gfx10_ngg_info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:53 +02:00
Samuel Pitoiset
7eba5666fa radv: store GFX10 NGG state as part of the shader info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:51 +02:00
Samuel Pitoiset
349caedee0 radv: store GFX9 GS state as part of the shader info
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:47 +02:00
Samuel Pitoiset
a9af11f1fa radv: fill shader info for all stages in the pipeline
This shouldn't be in NIR->LLVM because ACO also needs the shader
info. This will also help for computing some NGG values that are
necessary for declaring LDS symbols.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:45 +02:00
Samuel Pitoiset
8cf297c7b1 radv: do not pass all compiler options to the shader info pass
Only the pipeline layout and the shader keys are needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-09-10 09:26:42 +02:00
Marek Olšák
ef919d8dcb radeonsi: remove redundant si_texture offset and size fields
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
e4c84d8678 radeonsi: move texture storage allocation outside of radeonsi
possible code sharing with radv

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
58ccadfc5c radeonsi: move HTILE allocation outside of radeonsi
ac_surface computes it for amdgpu.
radeon_drm_surface computes it for radeon.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
30a1dd0ee6 radeonsi: handle NO_DCC early
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
7d4a10a29f ac/surface: add RADEON_SURF_NO_FMASK
This controls FMASK and CMASK computation for MSAA.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
6633863150 r300,r600,radeonsi: set winsys_handle::stride,offset in drivers, not winsyses
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
5ac6908263 r300,r600,radeonsi: read winsys_handle::stride,offset in drivers, not winsyses
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
d95afd8b9e radeonsi/gfx10: fix wave occupancy computations
Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
42ea0b7b52 radeonsi: only support at most 1024 threads per block
LLVM 10 won't support 2048.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
c1e08cb6d5 radeonsi: disable DCC when importing a texture from an incompatible driver
and unify the code.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
28adf0d00c radeonsi/gfx10: don't call gfx10_destroy_query with compute-only contexts
This fixes a crash.

Cc: 19.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
2f42d4cacc radeonsi/gfx10: use fma for TGSI_OPCODE_FMA
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
d64593e3c4 ac: use fma on gfx10
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
2019-09-09 23:43:03 -04:00
Marek Olšák
d979e5bfab ac: enable LLVM atomic optimizations 2019-09-09 23:43:03 -04:00
Lepton Wu
263136fb5d virgl: Fix pipe_resource leaks under multi-sample.
Fixes: 900a80f9e4 ("virgl: virgl_transfer should own its virgl_resource")

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
2019-09-10 03:42:55 +00:00
Kenneth Graunke
410894c643 iris: Avoid flushing for cache history on transfer range flushes
The VBO module maps a buffer with GL_MAP_FLUSH_EXPLICIT, and keeps
appending data, and calling glFlushMappedBufferRange().  We were
invalidating the VF cache each time it flushed a new range, which
results in a ton of VF flushes.

If the contents of the destination in the target range are undefined
(never even possibly written), this patch makes us assume that it's
likely not in the cache and so cache invalidations are required.  If
the destination range is defined, we continue cache flushing as we may
need to expunge stale data.

This eliminates 88% of the VF cache invalidates on Manhattan 3.0.
Improves performance in Manhattan 3.0 on my Icelake 8x8 with the GPU
frequency locked to 700Mhz by 0.376724% +/- 0.0989183% (n=10).
2019-09-09 15:08:22 -07:00
Kenneth Graunke
7d28e9ddd6 iris: Optimize out redundant sampler state binds
This cuts roughly 85% of the 3DSTATE_SAMPLER_STATE_POINTERS_PS calls in
the J2DBench images test.  For some reason, the state tracker is calling
bind_sampler_state with the same sampler state in a bunch of cases.
2019-09-09 11:55:27 -07:00
Kenneth Graunke
325e25d689 iris: Add support for the always_flush_cache=true debug option.
This can be useful for debugging missing flushes.
2019-09-09 11:55:27 -07:00
Adam Jackson
366b2e5c19 mesa: Eliminate gl_config::rgbMode
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-09-09 14:12:57 -04:00
Adam Jackson
78e0fa6bb2 mesa: Eliminate gl_config::have{Accum,Depth,Stencil}Buffer
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2019-09-09 14:12:57 -04:00