Matt Turner 713c123bfa intel/compiler: Don't disassemble align1 3-src operands on Gen < 10 ... Since the platforms don't support align1 3-src instructions, the contents of these operands are not going to be meaningful. Just don't print them to avoid hitting some assertions in brw_inst functions. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>		2020-01-22 00:19:20 +00:00
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amd	radv: Remove syncobj_handle variable in header.	2020-01-21 12:28:00 +00:00
broadcom	nir/lower_atomics_to_ssbo: Also lower barriers	2020-01-13 17:23:47 +00:00
compiler	compiler: Add a note about how num_ssbos works in the program info.	2020-01-21 10:06:23 -08:00
drm-shim
egl	egl/android: Restrict minimum triple buffering for android color_buffers	2020-01-15 09:42:08 +00:00
etnaviv
freedreno	turnip: Disable UBWC on images used as storage images.	2020-01-21 19:29:59 +00:00
gallium	gallium: check all planes' pipe formats in case of multi-samplers	2020-01-21 23:04:33 +00:00
gbm
getopt
glx
gtest
hgl
imgui
intel	intel/compiler: Don't disassemble align1 3-src operands on Gen < 10	2020-01-22 00:19:20 +00:00
loader	intel: Use similar brand strings to the Windows drivers	2020-01-13 19:42:35 -08:00
mapi	glapi / teximage: implement EGLImageTargetTexStorageEXT	2020-01-13 14:57:18 -08:00
mesa	nir: Drop the ssbo_offset to atomic lowering.	2020-01-21 10:06:23 -08:00
panfrost	panfrost/midgard: Print the actual source register for store operations	2020-01-21 14:57:12 +00:00
util	util/vector: Fix u_vector_foreach when head rolls over	2020-01-17 22:21:00 +00:00
vulkan	vulkan/wsi: Implement VK_KHR_swapchain_mutable_format	2020-01-17 18:27:29 +00:00
meson.build
SConscript