Juan A. Suarez Romero 64943f2063 broadcom/compiler: use VPM offsets in GS load_per_vertex input ... Vertex Shader has a store_out lowering pass that converts gallium driver locations in offsets inside the VPM. One of the consequences is that these offsets are consecutives; that is, if the VS stores VARYING_SLOT_VAR0.xyz and VARYING_SLOT_VAR1.xyzw, there isn't a hole in the VPM offsets for the un-stored VARYING_SLOT_VAR0.w. Thus we need to change how the VPM offset is computed in the Geometry Shader when loading the inputs. This bug is exposed by !9050. v2 (Iago): - Include explanatory comment. - Use assert. Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10129>		2021-04-13 16:08:00 +00:00
..
meson.build	broadcom/compiler: add a constant alu optimization pass	2021-02-23 08:08:01 +00:00
nir_to_vir.c	broadcom/compiler: use VPM offsets in GS load_per_vertex input	2021-04-13 16:08:00 +00:00
qpu_schedule.c	broadcom/compiler: implement restriction for branch after setmsf	2021-04-05 06:38:19 +00:00
qpu_validate.c	broadcom/compiler: don't check for GFXH-1633 on V3D 4.2.x	2021-02-12 08:24:21 +00:00
v3d33_tex.c	broadcom/compiler: support pipelining of tex instructions	2021-02-04 10:33:10 +00:00
v3d33_vpm_setup.c
v3d40_tex.c	broadcom/compiler: Add a v3d_compile argument to vir_set_[pu]f	2021-02-12 07:05:33 +00:00
v3d_compiler.h	broadcom/compiler: rename unifa tracking fields	2021-04-09 10:31:40 +00:00
v3d_nir_lower_image_load_store.c	nir: Make nir_ssa_def_rewrite_uses_after take an SSA value	2021-03-08 16:59:55 +00:00
v3d_nir_lower_io.c	v3d: use intrinsic builders	2021-01-06 14:34:41 +00:00
v3d_nir_lower_line_smooth.c	v3d: use intrinsic builders	2021-01-06 14:34:41 +00:00
v3d_nir_lower_logic_ops.c	v3d: mark some variables static const	2021-01-13 07:24:32 +00:00
v3d_nir_lower_robust_buffer_access.c	nir: Extract shader_info->cs.shared_size out of union.	2021-04-08 14:39:28 +00:00
v3d_nir_lower_scratch.c	nir: Make nir_ssa_def_rewrite_uses take an SSA value	2021-03-08 16:59:55 +00:00
v3d_nir_lower_txf_ms.c
vir.c	nir/lower_idiv: add options to use fp32 for 8-bit division lowering	2021-04-12 16:19:46 +00:00
vir_dump.c	broadcom/compiler: use signed pointers for packed condition	2021-04-12 15:22:05 +00:00
vir_live_variables.c
vir_opt_constant_alu.c	broadcom/compiler: optimize constant vfpack	2021-03-22 12:17:13 +00:00
vir_opt_copy_propagate.c
vir_opt_dead_code.c	broadcom/compiler: drop the destination for unused ldunifa	2021-03-04 09:00:15 +01:00
vir_opt_redundant_flags.c
vir_opt_small_immediates.c
vir_register_allocate.c	broadcom/compiler: fix end of tmu sequence detection	2021-03-17 09:35:19 +00:00
vir_to_qpu.c	broadcom/compiler: add a NOP count stat to shader-db	2021-03-31 05:51:22 +00:00