mesa/src
Samuel Pitoiset 922cd38172 radv: implement out-of-order rasterization when it's safe on VI+
Disabled by default for now, it can be enabled with
RADV_PERFTEST=outoforder.

No CTS regressions on Polaris, and all Vulkan games I tested
look good as well.

Expect small performance improvements for applications where
out-of-order rasterization can be enabled by the driver.

Loosely based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-04-04 13:32:00 +02:00
..
amd radv: implement out-of-order rasterization when it's safe on VI+ 2018-04-04 13:32:00 +02:00
broadcom util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_two_or_zero 2018-03-29 14:09:23 -07:00
compiler compiler/spirv: set is_shadow for depth comparitor sampling opcodes 2018-04-04 07:57:58 +02:00
egl x11: Only report supported DRI3/Present versions 2018-03-30 16:53:51 +01:00
gallium radeonsi/gfx9: fix bad LLVM params in monolithic LS+HS 2018-04-03 11:07:28 -04:00
gbm gbm: remove never-implemented function 2018-03-28 16:25:52 +01:00
getopt
glx x11: Only report supported DRI3/Present versions 2018-03-30 16:53:51 +01:00
gtest
hgl
intel intel: compiler: silence compiler warning 2018-04-04 11:57:39 +01:00
loader dri3: Don't fail on version mismatch 2018-03-20 08:52:59 +00:00
mapi glapi: define GL_API to be KEYWORD1 in glapi_dispatch.c (v2) 2018-03-30 14:33:33 -06:00
mesa i965: Extend the negative 32-bit deltas to 64-bits 2018-04-03 22:48:09 -07:00
util util: Include bitscan.h directly 2018-03-29 14:09:30 -07:00
vulkan vulkan/wsi/wayland: fix leaks 2018-04-03 22:09:57 +01:00
git_sha1.h.in
Makefile.am
meson.build
SConscript