mesa/src/intel
Jason Ekstrand 0737b37dcd intel/fs: Emit URB fences when we have LSC
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Tested-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13092>
2021-09-29 20:52:54 +00:00
..
blorp intel/blorp: Fix Gfx7 stencil surface state valign 2021-08-25 22:39:30 +00:00
common intel: Add and use max_constant_urb_size_kb 2021-09-27 20:51:28 +00:00
compiler intel/fs: Emit URB fences when we have LSC 2021-09-29 20:52:54 +00:00
dev intel: Add and use max_constant_urb_size_kb 2021-09-27 20:51:28 +00:00
ds pps: Avoid duplicate elements in with_datasources array. 2021-09-29 07:26:18 +00:00
genxml intel: Add underscores to HALIGN and VALIGN enums 2021-08-25 22:39:30 +00:00
isl intel/isl: Enable MOCS 61 for external surfaces on TGL 2021-09-14 05:33:53 +00:00
nullhw-layer intel/nullhw: fix build 2021-03-26 20:12:40 +00:00
perf intel/perf: Use a char array for OA perf query data 2021-08-11 23:57:52 +00:00
tools intel/error-decode: printout INSTDONE_GEOM register for Gfx12.5 2021-08-17 08:05:45 +00:00
vulkan anv: Switch to common GetDeviceQueues2 and DeviceWaitIdle 2021-09-28 21:08:25 +00:00
Makefile.perf.am intel: Rename GEN_PERF prefix to INTEL_PERF in build files 2021-04-20 20:06:34 +00:00
meson.build pps: Intel pps driver 2021-05-18 14:28:48 +00:00