mesa/src/broadcom
Iago Toral Quiroga d81a6e5f1d broadcom/compiler: change register allocation policy for accumulators
The current policy is to always favor accumulators if possible, however,
this is not always optimal.

Particularly, accumulators play a crucial role in enabling QPU instruction
merges, since these are limited to both the ADD and the ALU instructions
addressing at most 2 physical registers. For 2-src instructions, this means
that to be able to merge we need them to address at least 2 accumulators.

While favoring accumulators does help the case for instruction merges in
general, it is risky to assign accumulators to variables that have
long life spans. Doing so will make the accumulator unavailable for
any other instructions during that life span, and since we only have a few
accumulators, we can quickly run out and losing our capacity to merge
instructions for large parts of the qpu program.

On the other hand, we also want to avoid the extreme case were we keep
allocating physical registers to the point we run out, even if we have
accumulators available, since accumulators have additional restrictions
and may not be suitable for everything.

This change continues the policy of favoring accumulators, but it only
does so if the life span of the temps is short, to ensure that we can
recycle accumulators often across instructions and avoid running out
for sections of the QPU code, unless we are already running out of
physical registers.

total instructions in shared programs: 13654647 -> 13336921 (-2.33%)
instructions in affected programs: 11015919 -> 10698193 (-2.88%)
helped: 39758
HURT: 17325
Instructions are helped.

total threads in shared programs: 412046 -> 412038 (<.01%)
threads in affected programs: 16 -> 8 (-50.00%)
helped: 0
HURT: 4
Threads are HURT.

total uniforms in shared programs: 3745726 -> 3746003 (<.01%)
uniforms in affected programs: 17296 -> 17573 (1.60%)
helped: 76
HURT: 99
Uniforms are HURT.

total max-temps in shared programs: 2364430 -> 2359942 (-0.19%)
max-temps in affected programs: 109117 -> 104629 (-4.11%)
helped: 2893
HURT: 772
Max-temps are helped.

total spills in shared programs: 5727 -> 5746 (0.33%)
spills in affected programs: 221 -> 240 (8.60%)
helped: 1
HURT: 2

total fills in shared programs: 13121 -> 13139 (0.14%)
fills in affected programs: 466 -> 484 (3.86%)
helped: 1
HURT: 2

total sfu-stalls in shared programs: 33432 -> 34491 (3.17%)
sfu-stalls in affected programs: 18219 -> 19278 (5.81%)
helped: 4459
HURT: 5087
Inconclusive result

total inst-and-stalls in shared programs: 13688079 -> 13371412 (-2.31%)
inst-and-stalls in affected programs: 11030017 -> 10713350 (-2.87%)
helped: 39630
HURT: 17429
Inst-and-stalls are helped.

total nops in shared programs: 335753 -> 333708 (-0.61%)
nops in affected programs: 112659 -> 110614 (-1.82%)
helped: 8726
HURT: 7383
Inconclusive result

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10686>
2021-05-08 13:15:42 +02:00
..
ci ci/v3d: Update piglit expectations. 2021-04-30 10:22:53 +02:00
cle intel: Rename gen_10 to ver_10 2021-04-20 20:06:34 +00:00
clif v3dv: clif format dumping support 2020-10-13 21:21:26 +00:00
common broadcom/common: move CSD supergroup sizing to a common helper 2021-05-04 15:53:23 +00:00
compiler broadcom/compiler: change register allocation policy for accumulators 2021-05-08 13:15:42 +02:00
drm-shim vc4: add drm-shim 2021-01-28 16:14:06 +00:00
qpu broadcom/qpu: rename from VC5 to V3D 2021-04-29 11:22:12 +02:00
simulator broadcom/simulator: change references to VC5 2021-04-29 11:22:12 +02:00
vulkan v3dv: setup loop unrolling 2021-05-06 12:25:22 +02:00
.editorconfig
Android.cle.mk
Android.genxml.mk
Android.mk
Makefile.sources v3d: Add a lowering pass for line smoothing 2020-07-06 21:59:16 +00:00
meson.build broadcom/common: move CSD supergroup sizing to a common helper 2021-05-04 15:53:23 +00:00