mesa/src
Samuel Pitoiset c16bf48bfc radv: adjust the DCC base VA for mipmapped color attachments
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-06-18 12:24:26 +02:00
..
amd radv: adjust the DCC base VA for mipmapped color attachments 2019-06-18 12:24:26 +02:00
broadcom v3d: implement simultaneous peripheral access exceptions for V3D 4.1+ 2019-06-18 08:09:03 +02:00
compiler glsl: Fix out of bounds read in shader_cache_read_program_metadata 2019-06-17 21:22:19 -05:00
egl egl: compare the whole list of attributes 2019-06-11 12:18:09 +00:00
etnaviv etnaviv: etnaviv_bo_cache_test: Use /dev/dri/renderD128 by default 2019-06-05 08:58:05 +00:00
freedreno ir3: initialize progress false before ir3_nir_lower_imul 2019-06-14 08:21:42 +03:00
gallium v3d: only flush jobs accessing the query BO when reading query results 2019-06-18 08:09:03 +02:00
gbm
getopt
glx glx/windows: Fix compilation with -Werror-format 2019-06-07 11:28:48 -07:00
gtest
hgl
imgui
intel anv: Set STATE_BASE_ADDRESS upper bounds on gen7 2019-06-17 18:53:07 -05:00
loader
mapi mapi: correctly handle the full offset table 2019-06-10 14:04:30 +01:00
mesa st/mesa: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps() 2019-06-14 20:13:46 +00:00
util i965: Fix INTEL_DEBUG=bat 2019-06-12 15:57:16 -07:00
vulkan vulkan: Update the XML and headers to 1.1.110 2019-06-04 17:30:51 +00:00
meson.build build: Build etnaviv drm 2019-06-05 08:58:05 +00:00
SConscript