mesa/src/intel
Lionel Landwerlin e400ac52e4 intel/sanitize_gpu: deal with non page multiple buffer sizes
We can only map at page aligned offsets. We got that wrong with buffer
size where (size % 4096) != 0 (anv has a WA buffer of 1024).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
2018-11-05 15:45:07 +00:00
..
blorp blorp: Emit a dummy 3DSTATE_WM prior to 3DSTATE_WM_HZ_OP 2018-10-26 16:39:35 -05:00
common intel: Use a URB start offset of 0 for disabled stages. 2018-11-03 23:25:57 -07:00
compiler intel/compiler: Stop assuming the entrypoint is called "main" 2018-10-30 20:14:52 -05:00
dev intel: Introducing Whiskey Lake platform 2018-10-11 10:02:40 -07:00
genxml anv/icl: Set Error Detection Behavior Control Bit in L3CNTLREG 2018-11-01 12:00:23 -07:00
isl intel/isl: Add a unit suffixes to some struct fields and variables 2018-09-26 08:52:26 -05:00
tools intel/sanitize_gpu: deal with non page multiple buffer sizes 2018-11-05 15:45:07 +00:00
vulkan anv/icl: Disable prefetching of sampler state entries 2018-11-02 08:34:33 -07:00
Android.blorp.mk
Android.common.mk
Android.compiler.mk
Android.dev.mk
Android.genxml.mk
Android.isl.mk
Android.mk
Android.vulkan.mk anv/android: we need git_sha1.h in include paths 2018-10-12 07:29:03 +03:00
Makefile.am configure: allow building with python3 2018-10-31 19:15:50 +00:00
Makefile.blorp.am
Makefile.common.am
Makefile.compiler.am configure: allow building with python3 2018-10-31 19:15:50 +00:00
Makefile.dev.am
Makefile.genxml.am
Makefile.isl.am
Makefile.sources intel/compiler: Do image load/store lowering to NIR 2018-08-29 14:04:02 -05:00
Makefile.tools.am intel/tools: new i965_disasm tool 2018-08-29 11:19:55 -07:00
Makefile.vulkan.am configure: allow building with python3 2018-10-31 19:15:50 +00:00
meson.build intel: compiler option msse2 and mstackrealign 2018-09-07 13:45:46 +01:00