Jose Maria Casanova Crespo a5df0fa0b1 v3d: writes to magic registers aren't RF writes after THREND ... Shaders must not attempt to write to the register files in the last three instructions, but that doesn't include the magic registers: nop ; nop ; thrsw; ldtmu.- *** ERROR *** nop ; nop nop ; nop v2: Simplify validation rules. (Eric Anholt) v3: Adjust validation even more. (Eric Anholt) Reviewed-by: Eric Anholt <eric@anholt.net>		2019-09-05 22:54:13 +01:00
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meson.build	v3d: add lowering for OpenGL logic operations	2019-07-12 09:16:38 +02:00
nir_to_vir.c	nir: Add explicit signs to image min/max intrinsics	2019-08-21 17:19:55 +00:00
qpu_schedule.c	v3d: Avoid scheduling an instruction that stalls waiting for SFU retval	2019-07-22 03:00:50 +02:00
qpu_validate.c	v3d: writes to magic registers aren't RF writes after THREND	2019-09-05 22:54:13 +01:00
v3d33_tex.c
v3d33_vpm_setup.c
v3d40_tex.c	v3d: Use the correct opcodes for signed image min/max	2019-08-21 17:19:55 +00:00
v3d_compiler.h	v3d: add shader-db stat to count SFU stalls	2019-07-22 03:00:50 +02:00
v3d_nir_lower_image_load_store.c
v3d_nir_lower_io.c
v3d_nir_lower_logic_ops.c	v3d: emit correct lowering for logic operations with MSAA render targets	2019-07-18 08:59:35 +02:00
v3d_nir_lower_scratch.c	v3d: Use the new lower_to_scratch implementation for indirects on temps.	2019-04-12 16:16:58 -07:00
v3d_nir_lower_txf_ms.c	v3d: Use nir_shader_lower_instructions() for txf_ms lowering.	2019-07-18 11:28:56 -07:00
vir.c	nir: Fix num_ssbos when lowering atomic counters	2019-09-03 15:54:54 +02:00
vir_dump.c	v3d: Add missing dumping for the spill offset/size uniforms.	2019-04-12 15:59:31 -07:00
vir_live_variables.c
vir_opt_copy_propagate.c
vir_opt_dead_code.c
vir_opt_redundant_flags.c	v3d: fix checking twice auf flag	2019-06-13 11:45:18 +02:00
vir_opt_small_immediates.c
vir_register_allocate.c	v3d: Fix detection of TMU write sequences in register spilling.	2019-04-26 12:42:30 -07:00
vir_to_qpu.c	tree-wide: replace MAYBE_UNUSED with ASSERTED	2019-07-31 09:41:05 +01:00