Marcin Ślusarz 97c3ec6116 intel/compiler: cache computed register pressure benefit ... This halves the number of calls to get_register_pressure_benefit and decreases shader-db CPU time by ~1.5%. Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8741>		2021-01-29 11:31:39 +00:00
..
brw_cfg.cpp
brw_cfg.h
brw_clip.h
brw_clip_line.c
brw_clip_point.c
brw_clip_tri.c
brw_clip_unfilled.c
brw_clip_util.c
brw_compile_clip.c	intel: drop likely/unlikely around INTEL_DEBUG	2020-10-06 18:43:07 +00:00
brw_compile_sf.c	intel: drop likely/unlikely around INTEL_DEBUG	2020-10-06 18:43:07 +00:00
brw_compiler.c	nir: replace .lower_sub with .has_fsub and .has_isub	2021-01-11 19:13:51 +00:00
brw_compiler.h	intel/fs: Separate SLM size calculation from encoding	2021-01-19 21:49:04 +00:00
brw_dead_control_flow.cpp
brw_dead_control_flow.h
brw_debug_recompile.c
brw_disasm.c	intel/disasm: Don't rely on FALLTHROUGHTs to print unsupported SFID	2020-11-25 16:46:16 +00:00
brw_disasm_info.c
brw_disasm_info.h
brw_eu.cpp
brw_eu.h	intel/fs: Add and implement intel-specific ray-tracing intrinsics	2020-11-25 05:37:10 +00:00
brw_eu_compact.c	intel: remove dead code	2020-11-02 19:58:56 +00:00
brw_eu_defines.h	intel/fs: Emit code for Gen12-HP indirect compute data	2021-01-13 13:10:28 -08:00
brw_eu_emit.c	intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND	2021-01-28 17:57:48 +00:00
brw_eu_util.c
brw_eu_validate.c
brw_fs.cpp	intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND	2021-01-28 17:57:48 +00:00
brw_fs.h	intel/fs: Use BRW_OPCODE_HALT for discards	2020-12-01 16:19:08 -06:00
brw_fs_bank_conflicts.cpp
brw_fs_builder.h	intel/fs: Implement umin/umax shuffle	2021-01-22 18:38:38 +00:00
brw_fs_cmod_propagation.cpp
brw_fs_combine_constants.cpp
brw_fs_copy_propagation.cpp	intel/fs: QUAD_SWIZZLE requires packed data	2021-01-22 18:38:37 +00:00
brw_fs_cse.cpp	intel/fs: Use BRW_OPCODE_HALT for discards	2020-12-01 16:19:08 -06:00
brw_fs_dead_code_eliminate.cpp
brw_fs_generator.cpp	intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND	2021-01-28 17:57:48 +00:00
brw_fs_live_variables.cpp
brw_fs_live_variables.h
brw_fs_lower_pack.cpp
brw_fs_lower_regioning.cpp
brw_fs_nir.cpp	intel/compiler: Move brw_reg_type_for_bit_size to brw_reg_type.h	2021-01-22 18:38:37 +00:00
brw_fs_reg_allocate.cpp	intel/fs: don't spill a register, set by undef	2020-12-21 21:18:01 +00:00
brw_fs_register_coalesce.cpp
brw_fs_saturate_propagation.cpp
brw_fs_scoreboard.cpp	intel/fs: Rename PLACEHOLDER_HALT to HALT_TARGET	2020-12-01 16:18:50 -06:00
brw_fs_sel_peephole.cpp
brw_fs_validate.cpp
brw_fs_visitor.cpp	intel/compiler: Add support for bindless shaders	2020-11-25 05:37:09 +00:00
brw_gen_enum.h	intel/compiler: Add GEN125 to enum gen	2020-12-01 19:06:22 +00:00
brw_inst.h
brw_interpolation_map.c
brw_ir.h	intel/fs: Add an ex_desc field to fs_inst for SHADER_OPCODE_SEND	2021-01-28 17:57:48 +00:00
brw_ir_allocator.h
brw_ir_analysis.h	intel/compiler: use C++ template instead of preprocessor	2020-11-03 10:42:29 +00:00
brw_ir_fs.h	intel/reg,fs: Handle immediates properly in subscript()	2021-01-22 18:38:37 +00:00
brw_ir_performance.cpp	intel/fs: Use BRW_OPCODE_HALT for discards	2020-12-01 16:19:08 -06:00
brw_ir_performance.h
brw_ir_vec4.h
brw_nir.c	compiler: Use util/bitset.h for system_values_read	2021-01-26 20:20:47 +00:00
brw_nir.h	brw/vec4: Don't convert tex dest type to glsl_type	2021-01-25 11:21:42 +01:00
brw_nir_analyze_boolean_resolves.c
brw_nir_analyze_ubo_ranges.c
brw_nir_attribute_workarounds.c
brw_nir_clamp_image_1d_2d_array_sizes.c
brw_nir_lower_alpha_to_coverage.c
brw_nir_lower_conversions.c
brw_nir_lower_cs_intrinsics.c
brw_nir_lower_image_load_store.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_lower_intersection_shader.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_lower_mem_access_bit_sizes.c	intel/nir: Lower load_global_constant in lower_mem_access_bit_sizes	2020-10-08 03:56:01 +00:00
brw_nir_lower_rt_intrinsics.c	nir: add generated intrinsic builders	2020-11-26 17:50:38 +00:00
brw_nir_lower_scoped_barriers.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_lower_shader_calls.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_opt_peephole_ffma.c
brw_nir_rt.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_rt.h	intel/rt: Add a helper to create the raygen trampoline shader	2020-11-25 05:37:10 +00:00
brw_nir_rt_builder.h	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_tcs_workarounds.c	intel/compiler: use intrinsic builders	2021-01-06 14:34:41 +00:00
brw_nir_trig_workarounds.py
brw_packed_float.c
brw_predicated_break.cpp
brw_reg.h	intel/reg,fs: Handle immediates properly in subscript()	2021-01-22 18:38:37 +00:00
brw_reg_type.c
brw_reg_type.h	intel/compiler: Move brw_reg_type_for_bit_size to brw_reg_type.h	2021-01-22 18:38:37 +00:00
brw_rt.h	intel/rt: Implement push constants as global memory reads	2020-11-25 05:37:10 +00:00
brw_schedule_instructions.cpp	intel/compiler: cache computed register pressure benefit	2021-01-29 11:31:39 +00:00
brw_shader.cpp	intel/fs: Use BRW_OPCODE_HALT for discards	2020-12-01 16:19:08 -06:00
brw_shader.h	intel/compiler: use C++ template instead of preprocessor	2020-11-03 10:42:29 +00:00
brw_vec4.cpp	compiler: Use util/bitset.h for system_values_read	2021-01-26 20:20:47 +00:00
brw_vec4.h	brw/vec4: Don't convert tex dest type to glsl_type	2021-01-25 11:21:42 +01:00
brw_vec4_builder.h	intel/vec4: Remove inline lowering of LRP	2020-09-28 11:43:10 -07:00
brw_vec4_cmod_propagation.cpp
brw_vec4_copy_propagation.cpp	intel/vec4: Remove all support for Gen8+ [v2]	2020-09-28 11:43:10 -07:00
brw_vec4_cse.cpp
brw_vec4_dead_code_eliminate.cpp
brw_vec4_generator.cpp	intel/vec4: Remove everything related to VS_OPCODE_SET_SIMD4X2_HEADER_GEN9	2020-09-28 11:43:10 -07:00
brw_vec4_gs_nir.cpp	nir: Add ability to count emitted GS primitives.	2020-10-09 15:26:14 +02:00
brw_vec4_gs_visitor.cpp	compiler: Use util/bitset.h for system_values_read	2021-01-26 20:20:47 +00:00
brw_vec4_gs_visitor.h
brw_vec4_live_variables.cpp
brw_vec4_live_variables.h
brw_vec4_nir.cpp	brw/vec4: Don't convert tex dest type to glsl_type	2021-01-25 11:21:42 +01:00
brw_vec4_reg_allocate.cpp
brw_vec4_surface_builder.cpp	intel/vec4: Remove all support for Gen8+ [v2]	2020-09-28 11:43:10 -07:00
brw_vec4_surface_builder.h
brw_vec4_tcs.cpp	compiler: Use util/bitset.h for system_values_read	2021-01-26 20:20:47 +00:00
brw_vec4_tcs.h
brw_vec4_tes.cpp
brw_vec4_tes.h
brw_vec4_visitor.cpp	brw/vec4: Don't convert tex dest type to glsl_type	2021-01-25 11:21:42 +01:00
brw_vec4_vs.h
brw_vec4_vs_visitor.cpp
brw_vue_map.c
brw_wm_iz.cpp
gen6_gs_visitor.cpp
gen6_gs_visitor.h
meson.build	intel/rt: Add lowering for combined intersection/any-hit shaders	2020-11-25 05:37:10 +00:00
test_eu_compact.cpp	intel/compiler: Remove Gen10-specific code	2020-10-15 09:29:53 -07:00
test_eu_validate.cpp	intel/compiler: Remove Gen10-specific code	2020-10-15 09:29:53 -07:00
test_fs_cmod_propagation.cpp
test_fs_copy_propagation.cpp
test_fs_saturate_propagation.cpp
test_fs_scoreboard.cpp
test_vec4_cmod_propagation.cpp
test_vec4_copy_propagation.cpp
test_vec4_dead_code_eliminate.cpp
test_vec4_register_coalesce.cpp
test_vf_float_conversions.cpp