Eric Anholt e3f4655805 nir: Make nir_lower_ubo_vec4() handle non-vec4-aligned loads. ... It turns out I had missed a case in my enumeration of why everything currently was vec4-aligned. Fixes a simple testcase of loading from a vec3[2] array in freedreno with IR3_SHADER_DEBUG=nouboopt. Initial shader-db results look devastating: total instructions in shared programs: 8019997 -> 12829370 (59.97%) total cat6 in shared programs: 87683 -> 145840 (66.33%) Hopefully this will recover once we introduce the i/o vectorizer, but that was blocked on getting the vec3 case fixed. Reviewed-by: Rob Clark <robdclark@chromium.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6612>		2020-09-30 19:53:43 +00:00
..
glsl	nir/gl_nir_lower_buffers: Set up align_mul/offset on UBOs.	2020-09-30 19:53:43 +00:00
nir	nir: Make nir_lower_ubo_vec4() handle non-vec4-aligned loads.	2020-09-30 19:53:43 +00:00
spirv	spirv: Only run repair_ssa if structured	2020-09-30 16:46:11 +00:00
Android.glsl.gen.mk
Android.glsl.mk
Android.mk
Android.nir.gen.mk
Android.nir.mk
builtin_type_macros.h	nir/vtn: Add support for kernel images to SPIRV-to-NIR.	2020-08-31 21:17:39 +00:00
glsl_types.cpp	glsl_type: Add packed to structure type comparison for hash map	2020-09-18 19:33:00 +00:00
glsl_types.h	nir: Add glsl_base_type unsigned -> signed version helper	2020-09-25 20:09:08 +00:00
Makefile.sources	nir: Add nir_lower_multiview pass	2020-09-29 10:31:59 +00:00
meson.build	spirv: add some tests for volatile/available/visible	2020-09-01 17:15:22 +00:00
nir_types.cpp	compiler/types: Add glsl_baseN_t_type(bit_size) helpers	2020-09-25 23:48:03 +00:00
nir_types.h	compiler/types: Add glsl_baseN_t_type(bit_size) helpers	2020-09-25 23:48:03 +00:00
SConscript
SConscript.glsl
SConscript.nir
SConscript.spirv
shader_enums.c	compiler: add INTERP_MODE_COLOR for radeonsi	2020-09-02 23:03:00 -04:00
shader_enums.h	compiler: add INTERP_MODE_COLOR for radeonsi	2020-09-02 23:03:00 -04:00
shader_info.h	nir: Add an internal flag to shader_info	2020-09-25 20:09:08 +00:00