anv: Fix PAT entry for userptr in integrated GPUs

Fixes: 060439bdf0 ("anv: Add ANV_BO_ALLOC_IMPORTED")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27040>
(cherry picked from commit 49fe060b5f39eb673b0c6a8757730386c6ce5570)
This commit is contained in:
José Roberto de Souza 2024-01-12 08:31:31 -08:00 committed by Eric Engestrom
parent 0ebdd39d85
commit 04ffe4771e
2 changed files with 5 additions and 3 deletions

View file

@ -314,7 +314,7 @@
"description": "anv: Fix PAT entry for userptr in integrated GPUs",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "060439bdf0e74f0f2e255d0a81b5356f9a2f5457",
"notes": null

View file

@ -5116,13 +5116,15 @@ const struct intel_device_info_pat_entry *
anv_device_get_pat_entry(struct anv_device *device,
enum anv_bo_alloc_flags alloc_flags)
{
if (alloc_flags & ANV_BO_ALLOC_IMPORTED)
return &device->info->pat.cached_coherent;
/* PAT indexes has no actual effect in DG2 and DG1, smem caches will always
* be snopped by GPU and lmem will always be WC.
* This might change in future discrete platforms.
*/
if (anv_physical_device_has_vram(device->physical)) {
if ((alloc_flags & ANV_BO_ALLOC_NO_LOCAL_MEM) ||
(alloc_flags & ANV_BO_ALLOC_IMPORTED))
if (alloc_flags & ANV_BO_ALLOC_NO_LOCAL_MEM)
return &device->info->pat.cached_coherent;
return &device->info->pat.writecombining;
}