anv: Fix PAT entry for userptr in integrated GPUs
Fixes: 060439bdf0 ("anv: Add ANV_BO_ALLOC_IMPORTED")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27040>
(cherry picked from commit 49fe060b5f39eb673b0c6a8757730386c6ce5570)
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0ebdd39d85
commit
04ffe4771e
2 changed files with 5 additions and 3 deletions
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@ -314,7 +314,7 @@
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"description": "anv: Fix PAT entry for userptr in integrated GPUs",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"main_sha": null,
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"because_sha": "060439bdf0e74f0f2e255d0a81b5356f9a2f5457",
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"notes": null
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@ -5116,13 +5116,15 @@ const struct intel_device_info_pat_entry *
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anv_device_get_pat_entry(struct anv_device *device,
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enum anv_bo_alloc_flags alloc_flags)
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{
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if (alloc_flags & ANV_BO_ALLOC_IMPORTED)
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return &device->info->pat.cached_coherent;
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/* PAT indexes has no actual effect in DG2 and DG1, smem caches will always
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* be snopped by GPU and lmem will always be WC.
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* This might change in future discrete platforms.
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*/
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if (anv_physical_device_has_vram(device->physical)) {
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if ((alloc_flags & ANV_BO_ALLOC_NO_LOCAL_MEM) ||
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(alloc_flags & ANV_BO_ALLOC_IMPORTED))
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if (alloc_flags & ANV_BO_ALLOC_NO_LOCAL_MEM)
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return &device->info->pat.cached_coherent;
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return &device->info->pat.writecombining;
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}
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