Commit graph

183418 commits

Author SHA1 Message Date
Eric Engestrom
754fd7b104
hasvk: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-15 00:59:33 +01:00
Eric Engestrom
f0885ca457
anv: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-15 00:59:29 +01:00
Eric Engestrom
a975b38320
tu: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-15 00:59:23 +01:00
Eric Engestrom
5879220880
v3dv: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-15 00:59:19 +01:00
Eric Engestrom
0c6696101e
radv: enable VK_EXT_headless_surface on all platforms except Windows
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27448>
2024-02-15 00:59:14 +01:00
Samuel Pitoiset
68b3e0c078
radv: enable GS_FAST_LAUNCH=2 by default for RDNA3 APUs (Phoenix)
GS_FAST_LAUNCH=1 shouldn't be used on GFX11 but it's still needed for
dGPUs (eg. NAVI31) because it destroys performance for unknown reasons.

On RDNA3 APUs, GS_FAST_LAUNCH=2 seems to be required for working
mesh shaders and performance is fine. There is possibly a firmware bug
on APUs that would explain why GS_FAST_LAUNCH=1 doesn't work on Phoenix.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10583
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10397
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2024-02-15 00:57:45 +01:00
Eric Engestrom
92cb6d5938 docs: add sha256sum for 24.0.1 2024-02-14 21:05:06 +00:00
Eric Engestrom
3e361635b8 VERSION: bump for 24.0.1 2024-02-14 20:55:00 +00:00
Eric Engestrom
68a46fd846 docs: add release notes for 24.0.1 2024-02-14 20:54:39 +00:00
Friedrich Vock
9b4abb2ed0 radv,driconf: Enable active AS leaf workaround for Jedi Survivor
Another game that can't get AS updates right.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27590>
(cherry picked from commit afab80bdb69928a6a5724a813b0903d0fdc62f8f)
2024-02-14 17:26:50 +00:00
Lionel Landwerlin
e4c2cbeb33 anv: fix buffer marker cache flush issues on MTL
For some yet unknown reason the CS L3 coherency setting is different
on MTL than DG2.

Fixes issues in tests from the subgroup :

  dEQP-VK.api.buffer_marker.*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c8e122a738 ("anv: Implement rudimentary VK_AMD_buffer_marker support")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27613>
(cherry picked from commit e54638ddf5e051daa72ea4606d4280dfc0791713)
2024-02-14 17:05:00 +00:00
Mike Blumenkrantz
8d18be6357 nir/lower_io: fix handling for compact arrays with indirect derefs
this logic relies on constant indexing for compact arrays, but this is
frequently not the case for compact array builtins (e.g., gl_TessLevelOuter).
the usual strategy of lowering to temps isn't viable in TCS, which means
io lowering has to be able to handle indirect access to these builtins
without crashing

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27534>
(cherry picked from commit 9e2c7314f2867de6f43e2add992590cfb92ccddd)
2024-02-14 17:04:59 +00:00
José Roberto de Souza
c1afe86299 intel: Fix intel_get_mesh_urb_config()
The round up in 'next_address_8kb = DIV_ROUND_UP(push_constant_kb, 8)'
was not decreasing the amount of URB available for Mesh and Task, what
could cause an over allocation of URB.

There was also no minimum entries enforcement for Mesh and Task, what
could cause 0 r.mesh_entries to be set in a case where tue_size_dw is
90% > than mue_size_dw. Same for r.task_entries when Task is enabled.

Also adding a few more asserts to help debug.

This fixes at least dEQP-VK.mesh_shader.ext.properties.mesh_payload_size
in LNL but it has potential to fixes other Mesh tests as well.

Cc: mesa-stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27555>
(cherry picked from commit d0fba810b3d334191ead4f16f5ba786250a70c32)
2024-02-14 17:04:53 +00:00
Georg Lehmann
003ba21b5f aco/gfx11+: limit hard clauses to 32 instructions
https://github.com/llvm/llvm-project/pull/81287

Foz-DB Navi31:
Totals from 406 (0.52% of 78112) affected shaders:
Instrs: 585342 -> 585750 (+0.07%)
CodeSize: 3077856 -> 3079456 (+0.05%); split: -0.00%, +0.05%
Latency: 3263165 -> 3263326 (+0.00%); split: -0.00%, +0.01%
InvThroughput: 664092 -> 664114 (+0.00%); split: -0.00%, +0.00%
VClause: 11143 -> 11537 (+3.54%)
SClause: 11878 -> 11884 (+0.05%)
Copies: 39807 -> 39815 (+0.02%)

Cc: mesa-stable
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27569>
(cherry picked from commit 6121497228d7388a5711c9458945b5903c401c7e)
2024-02-14 17:04:51 +00:00
Karol Herbst
73c637fcfe rusticl/mem: support GL_TEXTURE_BUFFER
Fixes: 2645003bdc ("rusticl: Create CL mem objects from GL")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27385>
(cherry picked from commit 3f7b3449309b7422d99d982b189473b4daed775a)
2024-02-14 17:04:48 +00:00
Karol Herbst
277c905b41 rusticl/mem: properly handle buffers
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10505
Fixes: 2645003bdc ("rusticl: Create CL mem objects from GL")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27385>
(cherry picked from commit 117291332c6f30c7759dcd3f70459a6d8e2b153e)
2024-02-14 17:04:47 +00:00
Karol Herbst
c206849335 nir/lower_cl_images: record image_buffers and msaa_images
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27385>
(cherry picked from commit 727cddd338aceb48915725fefec3fcc563e956e1)
2024-02-14 17:04:46 +00:00
Lionel Landwerlin
a2a141dffa anv: fix incorrect flushing on shader query copy
When doing query result copies in 3D mode, we're flushing the render
target cache, but the shader writes go through the dataport.

Fixes flakes/fails in piglit with shader query copies forced with Zink :

  $ query_copy_with_shader_threshold=0 ./bin/arb_query_buffer_object-coherency -auto -fbo

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b3b12c2c27 ("anv: enable CmdCopyQueryPoolResults to use shader for copies")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
(cherry picked from commit c53a4711cb77fdf19b93797106b2ddf846c32d37)
2024-02-14 17:04:41 +00:00
Lionel Landwerlin
48608401a3 intel/fs: rerun divergence prior to lowering non-uniform interpolate at sample
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 74a40cc4b6 ("intel/fs: move lower of non-uniform at_sample barycentric to NIR")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
(cherry picked from commit 2437556d83bc588efb97b81468695879ff23529e)
2024-02-14 17:04:39 +00:00
Lepton Wu
9b2d95ab13 llvmpipe: Set "+64bit" for X86_64
Without this, on some "buggy" qemu cpu setup, LLVM could crash
if LLVM detects the wrong CPU type.

Fixes: f92cadccc6 ("llvmpipe: Always using util_get_cpu_caps to get cpu caps for llvm on x86")

Signed-off-by: Lepton Wu <lepton@chromium.org>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27539>
(cherry picked from commit 04d26ceb0a87ca9e05a00405e2544f256e8e046c)
2024-02-14 17:04:37 +00:00
David Rosca
73b955965b radeonsi/vcn: Don't reinitialize encode session on bitrate/fps change
When bitrate or fps change is detected, only update rate control
parameters instead of completely reinitializing encode session.

This fixes an issue where if application changed bitrate or fps often,
the output bitrate would significantly overshoot the target bitrate in some
cases. In other cases, the output bitrate would be extremely low instead.

Cc: mesa-stable

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27548>
(cherry picked from commit 8d44a115080645c210e055fa410fb18accf510aa)
2024-02-14 17:04:18 +00:00
Lionel Landwerlin
23442c825b anv: don't unmap AUX ranges at BO delete
It is possible to free memory backing images before images are
destroyed :

   VkFreeMemory:

   "Memory can be freed whilst still bound to resources, but those
    resources must not be used afterwards."

The spec leaves us the option to keep a reference on the associated
memory and free it only when all the bound resources have been
destroyed. Here we choose to free memory immediately.

One particular test in the CTS
(dEQP-VK.synchronization.internally_synchronized_objects.pipeline_cache_graphics)
does the following :

   imgA = vkCreateImage()
   imgB = vkCreateImage()
   memA = vkAllocateMemory()
   vkBindImageMemory(imgA, memA) # Aux mapping with ref count = 1
   vkFreeMemory(memA)            # Aux mapping removed, ref count = 0
   memB = vkAllocateMemory()     # Same address as memA
   vkBindImageMemory(imgB, memB)
   vkDestroyImage(imgA)	         # Removes the mapping of imgB-memB

   vkQueueSubmit()               # hang with pagefault in AUX-TT

The solution implemented in this change is to not do anything AUX-TT
related in vkFreeMemory(). This soluation has some consequences,
because a virtual memory address range freed and reallocated cannot be
rebound in the AUX-TT until all the associated resources have released
their AUX-TT mapping (to bring back the AUX-TT refcount of the range
to 0). This should still be better than keeping the memory allocated
through refcounting of the anv_bo.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 7b87e1afbc ("anv: track & unbind image aux-tt binding")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10528
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27566>
(cherry picked from commit e0b4dfbbda97d98f4065c9cf536032936401c8d0)
2024-02-14 17:04:18 +00:00
Timothy Arceri
d1b79ef57b Revert "ci: Enable GALLIUM_DUMP_CPU=true only in the clang job"
Rob worded it well in 9e8450b65c.

"We don't want util_cpu to vomit cpu caps all over the test output."

This reverts commit c6979d97e4.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27564>
(cherry picked from commit 62fa5c8d0f059ba75d7208a0d081da811065ba1c)
2024-02-14 17:04:18 +00:00
M Henning
e7c7b4e2f1 nvk: Don't clobber vb0 after repeated blits
If a program does two blits in a row, we internally do a sequence of
operations that involves binding vb0.

Previously, the vb0 state after each operation would look something like:

| operation                    | cmd->state.gfx.vb0 | hardware  | save->vb0 |
| ---------------------------- | ------------------ | --------- | --------- |
|                              | user               | user      |           |
| nvk_meta_begin()             | user               | user      | user      |
| BindVertexBuffers(internal0) | internal0          | internal0 | user      |
| nvk_meta_end()               | internal0          | user      |           |
| nvk_meta_begin()             | internal0          | user      | internal0 |
| BindVertexBuffers(internal1) | internal1          | internal1 | internal0 |
| nvk_meta_end()               | internal1          | internal0 |           |

That is, CmdBindVertexBuffers() would update cmd->state.gfx.vb0, but
nvk_meta_end() would not. This meant that the last operation would bind a
driver-internal buffer instead of the original value that the user set.

This change fixes the issue by tracking cmd->state.gfx.vb0 in
nvk_cmd_bind_vertex_buffer(), which both CmdBindVertexBuffers() and
nvk_meta_end() call into.

After this commit, the state looks like:

| operation                    | cmd->state.gfx.vb0 | hardware  | save->vb0 |
| ---------------------------- | ------------------ | --------- | --------- |
|                              | user               | user      |           |
| nvk_meta_begin()             | user               | user      | user      |
| BindVertexBuffers(internal0) | internal0          | internal0 | user      |
| nvk_meta_end()               | user               | user      |           |
| nvk_meta_begin()             | user               | user      | user      |
| BindVertexBuffers(internal1) | internal1          | internal1 | user      |
| nvk_meta_end()               | user               | user      |           |

To test this commit, build gtk4 commit 87b66de1, run:

    GSK_RENDERER=vulkan gtk4-demo --run=image_scaling

then select trilinear filtering in the dropdown and check for rendering
artifacts.

Fixes: e1c66501 ("nvk: Use vk_meta for CmdClearAttachments")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27559>
(cherry picked from commit d98ff2cc4add875f2e372bf69e45b1c6a7b8a9c6)
2024-02-14 17:01:50 +00:00
Georg Lehmann
e8c13d5b9d aco: don't remove branches that skip v_writelane_b32
Cc: mesa-stable

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27537>
(cherry picked from commit cd6d9c5918feabe18a58f6b1096a55c1970d0883)
2024-02-14 17:01:49 +00:00
Georg Lehmann
ddb4aff2c2 aco/gfx11+: disable v_pk_fmac_f16_dpp
Public docs are apparently wrong: https://github.com/llvm/llvm-project/pull/79598#issuecomment-1933988048

Cc: mesa-stable

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27533>
(cherry picked from commit e927c5004f9f6305e2269b1b1f0950bcba916ce7)
2024-02-14 17:01:47 +00:00
Mark Janes
963ad46563 hasvk: add missing linker arguments
vulkan_icd_link_args was added for other vulkan drivers but not hasvk.
Without it, statically linked json-c symbols are wrongly exported.

Ref: 2b1e9b0fd6 ("anv: add linker script to fix android symbols")
Fixes: 78578a6ddb ("vk: move radv's linker symbols scripts for use in all drivers")
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27540>
(cherry picked from commit fb7240bef96b9faef6eba3a35205567dad1ec343)
2024-02-14 16:59:53 +00:00
Mike Blumenkrantz
8667ddc209 mesa: plumb errors through to texture allocation
the spec allows this and tests like spec@arb_texture_multisample@arb_texture_multisample-dsa-texelfetch
expect it

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25931>
(cherry picked from commit fab5c706fe453f440d3c85013d24dbe8230e36cc)
2024-02-14 16:59:44 +00:00
Danylo Piliaiev
46c290d94b tu: Do not print anything on systems without Adreno GPU
Output debug info only when explicitly requested with
TU_DEBUG=startup otherwise we should be silent.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10213
Fixes: a669147689
("tu: Always print startup failure messages")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27527>
(cherry picked from commit c8cc7c5c1863aa9098baaea3546dcbbbeb17f495)
2024-02-14 16:59:43 +00:00
Boris Brezillon
45c761f2c2 pan/va: Add missing valhall_enums dep to valhall_disasm
valhall_disasm compilation fails if the valhall_enums.h has
not be generated.

Fixes: 619566dea1 ("pan/va: Generate header containing enums")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10553
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27524>
(cherry picked from commit 49069a1243de8de3f658faa5fd8bb71d31c7d907)
2024-02-14 16:59:43 +00:00
Boris Brezillon
41b9381046 panfrost: Pad compute jobs with zeros on v4
Apparently, Midgard GPUs don't like when the last 2 words of
compute/vertex jobs contain garbage. Extend the compute job definition
to include a padding section thus aligning the job on a 64-byte boundary,
and add the according pan_section_pack() calls where we have a
compute job filled.

Fixes: b76420be1f ("panfrost: Split command stream descriptor definitions per-gen")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10558
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Tested-by: Anton Bambura <jenneron@postmarketos.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27515>
(cherry picked from commit 5b1b76e9cdd8b44538aa327c7705381fa68b891b)
2024-02-14 16:59:42 +00:00
Sviatoslav Peleshko
d329b14698 driconf: Apply dual color blending workaround to Dying Light
The game uses shader with `location=0` and `location=1` outputs where
it wants dual source blending and should've used `location=0, index=0`
and `location=0, index=1`.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10413
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27509>
(cherry picked from commit 0a1c8779e8705737bdb69622badaf2446ff6924a)
2024-02-14 16:59:41 +00:00
Kenneth Graunke
25b67841a1 driconf: Advertise GL_EXT_shader_image_load_store on iris for SVP13
SPECviewperf creo-03 needs GL_EXT_shader_image_load_store in order for
its shaders to compile but we don't support a few corner cases that
didn't make it into the ARB variant.  It seems to run fine with an
override, so just do that for now.

Cc: mesa-stable
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27429>
(cherry picked from commit 24d3c832121b123b42e3cbc39e8225085139cbb1)
2024-02-14 16:59:40 +00:00
Rob Clark
7d8c7ccc0d freedreno: Fix MSAA z/s layout in GMEM
A bit surprised that this didn't show up in any piglit or deqp.

Fixes: cf0c7258ee ("freedreno/a5xx: MSAA")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27508>
(cherry picked from commit c3062e3402fe693dd1cc0137217611081f993f12)
2024-02-14 16:59:37 +00:00
Pavel Ondračka
feacc7e5a3 r300: fix vs output register indexing
Vertex shaders were writing TEXCOORDs before GENERICS, however
fragment shaders were reading it the opposite way, so this caused
problems for shaders that used both TEXCOORD and GENERIC varyings.

Fixes: d4b8e8a481
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10489
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip.gawin@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27469>
(cherry picked from commit 0ac6801970f88402f4f98455652448bc5ca97096)
2024-02-14 16:09:59 +00:00
José Roberto de Souza
7d78a9b36b iris: Fix return of iris_wait_syncobj()
iris_wait_syncobj() succeed if IOCTL return is 0 otherwise it failled.

Cc: mesa-stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27500>
(cherry picked from commit 138303fb9dbad7754b109ca846a17799cc0dc1d5)
2024-02-14 16:09:59 +00:00
Connor Abbott
6e96c0df97 ir3/ra: Fix bug with collect source handling
It can be the case that a collect and one of its sources are assigned
to non-overlapping parts of the same merge set, for example:

	ssa_1 = ...
	ssa_2 = ...
	ssa_3 = ...

	ssa_4 = collect ssa_1, ssa_2 (kill), ssa_3
	... = ssa_4 (kill)

	ssa_5 = collect ssa_1, ssa_3

	... = ssa_1 (kill)
	... = ssa_3 (kill)
	... = ssa_5 (kill)

If we merge the first collect first, we get a merge set:

	ssa_1 (offset 0)
	ssa_2 (offset 2)
	ssa_3 (offset 4)
	ssa_4 (offset 0)

Now, we decide to merge ssa_1 and ssa_5:

	ssa_1 (offset 0)
	ssa_2 (offset 2)
	ssa_3 (offset 4)
	ssa_4 (offset 0)
	ssa_5 (offset 0)

ssa_3 cannot become a child of ssa_5 in the interval tree, just like a
source not in the same merge set, so we should not remove it and then
reinsert it assuming that RA will make it a child of ssa_5.

This fixes an RA validation error in Farming Simulater.

Fixes: 0ffcb19 ("ir3: Rewrite register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27497>
(cherry picked from commit aeed5fd98d47be122260bf0c232c2d8dfcd8d400)
2024-02-14 16:09:59 +00:00
Corentin Noël
eac978e36d zink: Only call reapply_color_write if EXT_color_write_enable is available
Allows to use zink with drivers that do not expose this extension.

Backport-to: 23.3 24.0
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27516>
(cherry picked from commit 72886cbefaa40f5d61c5deee5e125b353d32852f)
2024-02-14 16:09:59 +00:00
Eric Engestrom
8bb8f2ef2c .pick_status.json: Update to 90eae30bcb84d54dc871ddbb8355f729cf8fa900 2024-02-14 15:55:45 +00:00
Friedrich Vock
8fe6a8d395
radv/rt: Optimize update shader VGPR usage
Brings VGPR allocation down from 72 (absolutely insane) to 32.

We can now reach the theoretical maximum occupancy of 16 waves per SIMD.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27472>
2024-02-11 18:19:15 +01:00
Denis
4d00481127
Enable vp9dec as well as av1enc and av1dec 2024-02-11 17:35:18 +01:00
Denis
13d77565a9
Add build script 2024-02-11 17:32:45 +01:00
Denis
d990462c9a
.gitignore .cache 2024-02-11 17:32:37 +01:00
David Rosca
c3ba03903f frontends/va: Fix updating AV1 rate control parameters
Follow the same logic as H264.

Fixes: 5edbecb856 ("frontends/va: adding va av1 encoding functions")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27481>
(cherry picked from commit fa8e0ba3f739cb46cf7bb709903c0206f240c584)
2024-02-06 22:09:28 +00:00
David Heidelberg
cb6f5b00e9 meson: upgrade zlib wrap to 1.3.1
`$ meson wrap update zlib`

Cc: mesa-stable
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27311>
(cherry picked from commit 56f31d1847ba04c8214c68581a3a3c292fd300f4)
2024-02-06 22:09:27 +00:00
Rhys Perry
223c8cd0d3 aco: fix >8 byte linear vgpr copies
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27436>
(cherry picked from commit 174e37afb9ebcd556bc18555ca2aa3276b3d8e04)
2024-02-06 22:09:26 +00:00
Sviatoslav Peleshko
71c1740914 anv,driconf: Add sampler coordinate precision workaround for AoE 4
AoE4 samples texture on the edge between texels, which can cause
unexpected texel to be returned, and cause misrenderings. This workaround
enables coordinate rounding even in NEAREST mode, which fixes the problem.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9864
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27337>
(cherry picked from commit 0a44f6319ef49fd279156cbf37a3144f906bbc3e)
2024-02-06 22:09:25 +00:00
Tapani Pälli
7bca150d5a anv: flush tile cache independent of format with HIZ-CCS flush
Cc: mesa-stable
Fixes: ba87656079a ("anv: implement undocumented tile cache flush requirements")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10420
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10530
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27440>
(cherry picked from commit 5178ad761c9e8e86ffb3bc59322ec998c0ae2063)
2024-02-06 22:09:18 +00:00
Christian Duerr
7a27b2afba panfrost: Fix dual-source blending
If dual blending is enabled, only 1 output is supported. Multiple
outputs confuse the write combining pass in this case, leading to
incorrect output and/or an assert failure in emit_fragment_store.

The fix is straightforward, just skip the speculative emitting of
multiple outputs in the case where dual source blending is enabled.

This also adds an extra sanity check in `pan_nir_lower_zs_store` to
check for only one blend store being present.

Fixes: c65a9be421 ("panfrost: Preprocess shaders at CSO create time")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9487
Co-Authored-By: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26474>
(cherry picked from commit 49c1b404e5e1cf7010855c1345d01c53e3e17ea5)
2024-02-06 22:09:17 +00:00
Dave Airlie
acdfcc4243 radv: don't submit 0 length on UVD either.
The kernel checks for UVD msgs and if there aren't any gets upset,
so don't submit 0 length on UVD rings either to avoid that.

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27186>
(cherry picked from commit 47c725b53e41d0f6be81d88051f008447afc4df5)
2024-02-06 22:09:16 +00:00